hellworld.c

AT45DB161D的测试程序.rar

//ICC-AVR application builder : 2006-8-14 16:03:08
// Target : M128
// Crystal: 16.000Mhz

//1.debug rs232
//

#include<iom128v.h>
#include<delay.h>
#include<uart128.h>
#include<macros.h>
//#include<stdio.h>
#include<string.h>
#include<rtl8019.h>
#include<dataflash.h>
//#include<dataflash_debug.h>
//#include<at45db161d.h>
//**********************************************************************

//***************************************************************

#define ResetPort_H	   asm("sbi 0x18,4")
#define ResetPort_L	   asm("cbi 0x18,4")
extern unsigned char dataflash_wait_busy(void);
extern signed int debug_check_rx(void);
extern void uart0_init(void);
extern void uart1_init(void);

//unsigned char  readram(unsigned int iaddr);
void port_init(void);
void watchdog_init(void);
//void uart1_init(void);
//void writeram(unsigned int iaddr, unsigned char ctemp);
//void RAM_TEST(unsigned char );
void test_net(void);
//void sendstring1(unsigned int * txbuf);

//***********************************************************
/*
#define txbuf1_head 0x1100
//外部RAM大小0X7FFF-0X1100=0X6EFF=28415byte

extern volatile unsigned char txbuf1[28415];

//定义外部RAM地址
#define ext_PORT1 ((volatile unsigned char *)0x1100)
unsigned char *p=(unsigned char *)ext_PORT1;

//define mappings
void mapping_init(void)
{

 asm(
  ".area memory(abs)\n"
  ".org 0x1100\n"
  " _txbuf1:: .blkb 28415\n"
  ".text\n"
 );
 
}
*/
//***********************************************************

void port_init(void)
{
//PA AD0-AD7  地址
//PC AD8-AD15
 PORTA = 0xFF;
 DDRA  = 0xFF;

 PORTC = 0xFF; //m103 output only
 DDRC  = 0x00;

//PB4 NETRST O
 
 PORTB = 0x7F;
 DDRB  = 0x90;
 
 PORTD = 0xDF;
 DDRD  = 0x04;
// PE0 RXD0 
// PE1 TXD0
// PE4 NET_IRQ  i
// PE5 INFRA_IRQ  i
// 
 PORTE = 0xFF;
 DDRE  = 0x00;
 
 PORTF = 0xFF;
 DDRF  = 0x00;
 
 PORTG = 0x1F;
 DDRG  = 0x00;
}

//Watchdog initialisation
// prescale: 2048K cycles
void watchdog_init(void)
{
 WDR(); //this prevents a timout on enabling
 //WDTCR = 0x0F; //WATCHDOG ENABLED - dont forget to issue WDRs
 /* reset WDT */

/* Write logical one to WDTOE and WDE */
//WDTCR |= (1<<WDTOE) | (1<<WDE);
WDTCR=0X18;   //现在把WDTCH给关掉了
/* Turn off WDT */
WDTCR = 0x00;
//WDTCR=0X17;

}

/*
#pragma interrupt_handler int0_isr:2
void int0_isr(void)
{
 //external interupt on INT0
}
*/
//call this routine to initialise all peripherals
void init_devices(void)
{
 //stop errant interrupts until set up
 CLI(); //disable all interrupts
 XDIV  = 0x00; //xtal divider
 watchdog_init();
 port_init();
// mapping_init();



 //uartInit();
 uart0_init();
 uart1_init();
//**********************
//初始化  ATD45DB161D
dataflash_init();
// ATD45DB161D_Init();
//**********************
 //External RAM will reside between 8000h - FFFFh.
//There will be 2 wait states for both read and write.

// MCUCR = 0x80;
 //EICRA = 0x03; //extended ext ints
 //EICRB = 0x00; //extended ext ints
 //EIMSK = 0x01;
 //TIMSK = 0x00; //timer interrupt sources
 //ETIMSK = 0x00; //extended timer interrupt sources
// SEI(); //re-enable interrupts
 //all peripherals are now initialised
 

 
 
}
/*
void RAM_WRITE4DATA(unsigned char umode)
{ 
 unsigned int k=0;
 unsigned int i=0,j=0;
 unsigned char DATA,u; 
 unsigned char testramtable[4]={0x00,0x55,0xaa,0x00};


 
 sendstring1("init system ok!\n");
 sendstring1("now test system-ram  all is 32k !\n");
for(u=0;u<4;u++)
{
   
	sendstring1("----now write  ram  ");
	sendinthex1(testramtable[u]);
	sendstring1("\n");
	
	i=0;
	do
	{	if(!umode)*(p+i)=testramtable[u];//testok
			else  txbuf1[i]=testramtable[u];
			i++;
	}while(i<0x6f00);//while(i<0x6eff);//while(i>0x6eff);
	
	sendstring1("----write ok\n");
	sendstring1("----now check write\n");
	
	
	 k=0x1100;
		i=0;
		do
		{ 
		  	if(!umode)DATA = *(p+i);//test ok
		  	else	  DATA=txbuf1[i];
		  	if(DATA!=testramtable[u])
		  	{sendstring1("addr = ");
		  	sendinthex1(k);
		  //sendstring1(" =");
		  //sendinthex1(DATA);
		  	sendstring1("\n");
		  	}
		  k++;i++; 
 		}while(k<0x8000);//while(k<0x1110);
		//0x7fff);
		
 sendstring1("---- test system-ram  end!\n");
}
}
void RAMALLTEST(void)
{
 sendstring1("RAMTEST START !\n");
 sendstring1("-----POINTER  READ AND WRITE EXTERNAL 32K RAM----------\n");
 sendstring1("0 READ AND WRITE NO WAIT  PC7 RELEASED !\n");
 MCUCR = 0x80; // 允许外部并行扩展接口，忽略高位0X8000的等待时间
 XMCRA = 0x40; //0x00 external memory
 XMCRB = 0x01; // 释放PC7，作为通用I/O引脚使用 
 DDRC =  0xff; // PC7用于输出，（不影响PC0-PC6地址线） 
 PORTC = 0x00; // PC7输出0，（不影响PC0-PC6地址线） 
 RAM_WRITE4DATA(0);

 sendstring1("1 READ AND WRITE 1 WAIT  PC7 RELEASED !\n");
 MCUCR = 0x80; // 允许外部并行扩展接口，忽略高位0X8000的等待时间
 XMCRA = 0x44; //0x00 external memory
 XMCRB = 0x01; // 释放PC7，作为通用I/O引脚使用 
 DDRC =  0xff; // PC7,PC6用于输出，（不影响PC0-PC5地址线） 
 PORTC = 0x00; // PC7,PC6输出0，（不影响PC0-PC5地址线） 
 RAM_WRITE4DATA(0);


 sendstring1("2 READ AND WRITE 2 WAIT  PC7 RELEASED !\n");
 MCUCR = 0x80; // 允许外部并行扩展接口，忽略高位0X8000的等待时间
 XMCRA = 0x48; //0x00 external memory
 XMCRB = 0x01; // 释放PC7，作为通用I/O引脚使用 
 DDRC =  0xff; // PC7,PC6用于输出，（不影响PC0-PC5地址线） 
 PORTC = 0x00; // PC7,PC6输出0，（不影响PC0-PC5地址线） 
 RAM_WRITE4DATA(0);

 
 sendstring1("3 READ AND WRITE 2+1 WAIT  PC7 RELEASED !\n");
 MCUCR = 0x80; // 允许外部并行扩展接口，忽略高位0X8000的等待时间
 XMCRA = 0x4C; //0x00 external memory
 XMCRB = 0x01; // 释放PC7，作为通用I/O引脚使用 
 DDRC =  0xff; // PC7,PC6用于输出，（不影响PC0-PC5地址线） 
 PORTC = 0x00; // PC7,PC6输出0，（不影响PC0-PC5地址线） 
 RAM_WRITE4DATA(0);
 sendstring1("******POINTER  READ AND WRITE EXTERNAL 32K RAM*******\n");
 
 sendstring1("\n-----BUFFER READ AND WRITE EXTERNAL 32K RAM----------\n");
 sendstring1("4  READ AND WRITE  NOWAIT PC7  NO RELEASED !\n");
 MCUCR = 0x80; // 允许外部并行扩展接口，忽略高位0X8000的等待时间
 XMCRA = 0x40; //external memory
 RAM_WRITE4DATA(1);

 sendstring1("5  READ AND WRITE  1 WAIT PC7  NO RELEASED !\n");
 MCUCR = 0x80; // 允许外部并行扩展接口，忽略高位0X8000的等待时间
 XMCRA = 0x44; //external memory
 RAM_WRITE4DATA(1);

 sendstring1("6  READ AND WRITE  2WAIT PC7  NO RELEASED !\n");
 MCUCR = 0x80; // 允许外部并行扩展接口，忽略高位0X8000的等待时间
 XMCRA = 0x48; //external memory
 RAM_WRITE4DATA(1);

 sendstring1("7  READ AND WRITE  2+1WAIT PC7  NO RELEASED !\n");
 MCUCR = 0x80; // 允许外部并行扩展接口，忽略高位0X8000的等待时间
 XMCRA = 0x4A; //external memory
 RAM_WRITE4DATA(1);
 sendstring1("\n*******BUFFER READ AND WRITE EXTERNAL 32K RAM***********\n");
 
 sendstring1("---- RAM TEST OK!-----\n");
}

*/

//测试RTL8019AS
void test_net(void)
{unsigned char Byte1;
 MCUCR = 0x80;//|0x40; // 允许外部并行扩展接口，忽略高位0X8000的等待时间
 //XMCRA = 0x40; //0x00 external memory
 //XMCRB = 0x01; // 释放PC7，作为通用I/O引脚使用 

 RTL8019rst();
	
 sendstring1("now test rtl8019as!\n");

 sendstring1("now show first rtl8019as reg !\n");
 WY_Showregs();
 sendstring1("now init rtl8019as!\n");
 rtl8019Init();
 sendstring1("now show second rtl8019as reg !\n");
 WY_Showregs();
 sendstring1("----test rtl8019as end!\n");

}
//******************************************************************************
/*AT45DB161D的命令可以以组的形式分成4类,在任何时间都可以执行
The commands described previously can be grouped into four different categories 
to better describe which commands can be executed at what times.
//组A命令包含
Group A commands consist of:
1. Main Memory Page Read
2. Continuous Array Read
3. Read Sector Protection Register
4. Read Sector Lockdown Register
5. Read Security Register

//组B命令包含
Group B commands consist of:
1. Page Erase
2. Block Erase
3. Sector Erase
4. Chip Erase
5. Main Memory Page to Buffer 1 (or 2) Transfer
6. Main Memory Page to Buffer 1 (or 2) Compare
7. Buffer 1 (or 2) to Main Memory Page Program with Built-in Erase
8. Buffer 1 (or 2) to Main Memory Page Program without Built-in Erase
9. Main Memory Page Program through Buffer 1 (or 2)
10. Auto Page Rewrite

//组C命令包含
Group C commands consist of:
1. Buffer 1 (or 2) Read
2. Buffer 1 (or 2) Write
3. Status Register Read
4. Manufacturer and Device ID Read

//组D命令包含
Group D commands consist of:
1. Erase Sector Protection Register
2. Program Sector Protection Register
3. Sector Lockdown
4. Program Security Register
//如果组A命令还没有执行完成,在B,C,D中的其他命令不应该开始.但是,当组B中的自己定时
部分的内部命令在执行中,在组C中的任何命令都可以执行.使用BUFFER1的组B命令此时应该用
使用BUFFER2的组c命令,反之亦然.最后,当执行使用内部定时部分的组D命令执行时,只有
状态寄存器读命令可以被执行!
If a Group A command is in progress (not fully completed), then another command in Group A,
B, C, or D should not be started. However, during the internally self-timed portion of Group B
commands, any command in Group C can be executed. The Group B commands using buffer 1
should use Group C commands using buffer 2 and vice versa. Finally, during the internally selftimed
portion of a Group D command, only the Status Register Read command should be
executed.
*/

void main(void)
{

 init_devices();
// sendstring1("now uart1 !\n");
 //sendstring1("delay 1s!\n");
 delay_ms(2000);
sendstring1("now uart0!\n");
// test_net();
 //printf(" i come!\n  ");
 //putchar('d');
 //sendstring1("\n ");
 ATD45DB161D_test();
 /*
 RAMALLTEST();
 
 sendstring1("\n ");
 test_net();
 */

}