test1.ado

VHDL source code for test machine.

source {C:/Xilinx/data/projnav/scripts/VsimStopServer.tcl}
initIPC 1200
-- Auto Generated by Project Navigator to simulate
-- HDL Bencher Annotated Test Bench
--
vlib work
onbreak {resume}
onerror {quit -code 99 -force}
onElabError {resume}
vcom -93 -explicit  testmachine.vhd
vcom -93 -explicit  sreg8.vhd
vcom -93 -explicit  reg8.vhd
vcom -93 -explicit  buf8.vhd
vcom -93 -explicit  dec2to4.vhd
vcom -93 -explicit  or1_ent.vhd
vcom -93 -explicit  or2_ent.vhd
vcom -93 -explicit  and_ent.vhd
vcom -93 -explicit  project.vhd
vcom -93 -explicit  indicator.vhd
vcom -93 -explicit  fsm.vhd
vcom -93 -explicit  test1.ant
vsim -t 1ps  -lib work test1
run -all
quit -force