hdpdeps.ref

VHDL source code for test machine.

V1 54
FL D:/CShT/Final15.06.07/Project/ImportantVersion/buf8.vhd 2007/06/24.21:55:58
EN work/BUF8            FL D:/CShT/Final15.06.07/Project/ImportantVersion/buf8.vhd \
      PB ieee/STD_LOGIC_1164 PB ieee/STD_LOGIC_ARITH PB ieee/STD_LOGIC_UNSIGNED
AR work/BUF8/BEHAVIORAL \
      FL D:/CShT/Final15.06.07/Project/ImportantVersion/buf8.vhd EN work/BUF8
FL d:/csht/final15.06.07/project/importantversion/and_ent.vhd 2007/06/24.21:55:41
FL D:/CShT/Final15.06.07/Project/ImportantVersion/fsm.vhd 2007/06/24.22:22:55
EN work/FSM             FL D:/CShT/Final15.06.07/Project/ImportantVersion/fsm.vhd \
      PB ieee/STD_LOGIC_1164 PB ieee/STD_LOGIC_ARITH PB ieee/STD_LOGIC_UNSIGNED
AR work/FSM/STRUCT      FL D:/CShT/Final15.06.07/Project/ImportantVersion/fsm.vhd \
      EN work/FSM       CP TESTMACHINE    CP PROJECT        CP INDICATOR
FL D:/CShT/Final15.06.07/Project/ImportantVersion/indicator.vhd 2007/06/24.21:46:43
EN work/INDICATOR       FL D:/CShT/Final15.06.07/Project/ImportantVersion/indicator.vhd \
      PB ieee/STD_LOGIC_1164 PB ieee/STD_LOGIC_ARITH PB ieee/STD_LOGIC_UNSIGNED
AR work/INDICATOR/BEHAVIORAL \
      FL D:/CShT/Final15.06.07/Project/ImportantVersion/indicator.vhd \
      EN work/INDICATOR
FL d:/csht/final15.06.07/project/importantversion/testmachine.vhd 2007/06/24.21:55:24
FL D:/CShT/Final15.06.07/Project/ImportantVersion/testmachine.vhd 2007/06/24.21:55:24
EN work/TESTMACHINE \
      FL D:/CShT/Final15.06.07/Project/ImportantVersion/testmachine.vhd \
      PB ieee/STD_LOGIC_1164 PB ieee/STD_LOGIC_ARITH PB ieee/STD_LOGIC_UNSIGNED
AR work/TESTMACHINE/STRUCTURAL \
      FL D:/CShT/Final15.06.07/Project/ImportantVersion/testmachine.vhd \
      EN work/TESTMACHINE
FL D:/CShT/Final15.06.07/Project/ImportantVersion/or1_ent.vhd 2007/06/24.21:56:36
EN work/OR1_ENT         FL D:/CShT/Final15.06.07/Project/ImportantVersion/or1_ent.vhd \
      PB ieee/STD_LOGIC_1164 PB ieee/STD_LOGIC_ARITH PB ieee/STD_LOGIC_UNSIGNED
AR work/OR1_ENT/BEHAVIORAL \
      FL D:/CShT/Final15.06.07/Project/ImportantVersion/or1_ent.vhd \
      EN work/OR1_ENT
FL d:/csht/final15.06.07/project/importantversion/buf8.vhd 2007/06/24.21:55:58
FL D:/CShT/Final15.06.07/Project/ImportantVersion/or2_ent.vhd 2007/06/24.21:56:51
EN work/OR2_ENT         FL D:/CShT/Final15.06.07/Project/ImportantVersion/or2_ent.vhd \
      PB ieee/STD_LOGIC_1164 PB ieee/STD_LOGIC_ARITH PB ieee/STD_LOGIC_UNSIGNED
AR work/OR2_ENT/BEHAVIORAL \
      FL D:/CShT/Final15.06.07/Project/ImportantVersion/or2_ent.vhd \
      EN work/OR2_ENT
FL d:/csht/final15.06.07/project/importantversion/project.vhd 2007/06/24.21:47:14
FL d:/csht/final15.06.07/project/importantversion/dec2to4.vhd 2007/06/24.21:56:19
FL D:/CShT/Final15.06.07/Project/ImportantVersion/sreg8.vhd 2007/06/24.21:57:26
EN work/SREG8           FL D:/CShT/Final15.06.07/Project/ImportantVersion/sreg8.vhd \
      PB ieee/STD_LOGIC_1164 PB ieee/STD_LOGIC_ARITH PB ieee/STD_LOGIC_UNSIGNED
AR work/SREG8/BEHAVIORAL \
      FL D:/CShT/Final15.06.07/Project/ImportantVersion/sreg8.vhd EN work/SREG8
FL D:/CShT/Final15.06.07/Project/ImportantVersion/reg8.vhd 2007/06/24.21:57:12
EN work/REG8            FL D:/CShT/Final15.06.07/Project/ImportantVersion/reg8.vhd \
      PB ieee/STD_LOGIC_1164 PB ieee/STD_LOGIC_ARITH PB ieee/STD_LOGIC_UNSIGNED
AR work/REG8/BEHAVIORAL \
      FL D:/CShT/Final15.06.07/Project/ImportantVersion/reg8.vhd EN work/REG8
FL D:/CShT/Final15.06.07/Project/ImportantVersion/and_ent.vhd 2007/06/24.21:55:41
EN work/AND_ENT         FL D:/CShT/Final15.06.07/Project/ImportantVersion/and_ent.vhd \
      PB ieee/STD_LOGIC_1164 PB ieee/STD_LOGIC_ARITH PB ieee/STD_LOGIC_UNSIGNED
AR work/AND_ENT/BEHAVIORAL \
      FL D:/CShT/Final15.06.07/Project/ImportantVersion/and_ent.vhd \
      EN work/AND_ENT
FL d:/csht/final15.06.07/project/importantversion/sreg8.vhd 2007/06/24.21:57:26
FL d:/csht/final15.06.07/project/importantversion/indicator.vhd 2007/06/24.21:46:43
FL d:/csht/final15.06.07/project/importantversion/fsm.vhd 2007/06/24.22:22:55
FL d:/csht/final15.06.07/project/importantversion/reg8.vhd 2007/06/24.21:57:12
FL d:/csht/final15.06.07/project/importantversion/or1_ent.vhd 2007/06/24.21:56:36
FL D:/CShT/Final15.06.07/Project/ImportantVersion/project.vhd 2007/06/24.21:47:14
EN work/PROJECT         FL D:/CShT/Final15.06.07/Project/ImportantVersion/project.vhd \
      PB ieee/STD_LOGIC_1164 PB ieee/STD_LOGIC_ARITH PB ieee/STD_LOGIC_UNSIGNED
AR work/PROJECT/STRUCTURAL \
      FL D:/CShT/Final15.06.07/Project/ImportantVersion/project.vhd \
      EN work/PROJECT   CP SREG8          CP REG8           CP BUF8           CP DEC2TO4 \
      CP OR1_ENT        CP OR2_ENT        CP AND_ENT
FL D:/CShT/Final15.06.07/Project/ImportantVersion/dec2to4.vhd 2007/06/24.21:56:19
EN work/DEC2TO4         FL D:/CShT/Final15.06.07/Project/ImportantVersion/dec2to4.vhd \
      PB ieee/STD_LOGIC_1164 PB ieee/STD_LOGIC_ARITH PB ieee/STD_LOGIC_UNSIGNED
AR work/DEC2TO4/BEHAVIORAL \
      FL D:/CShT/Final15.06.07/Project/ImportantVersion/dec2to4.vhd \
      EN work/DEC2TO4
FL d:/csht/final15.06.07/project/importantversion/or2_ent.vhd 2007/06/24.21:56:51