importantversion.npl

VHDL source code for test machine.

JDF G
// Created by Project Navigator ver 1.0
PROJECT ImportantVersion
DESIGN importantversion
DEVFAM virtex2
DEVFAMTIME 0
DEVICE xc2v40
DEVICETIME 0
DEVPKG fg256
DEVPKGTIME 0
DEVSPEED -5
DEVSPEEDTIME 0
DEVTOPLEVELMODULETYPE HDL
TOPLEVELMODULETYPETIME 0
DEVSYNTHESISTOOL XST (VHDL/Verilog)
SYNTHESISTOOLTIME 0
DEVSIMULATOR Modelsim
SIMULATORTIME 0
DEVGENERATEDSIMULATIONMODEL VHDL
GENERATEDSIMULATIONMODELTIME 0
SOURCE fsm.vhd
SOURCE indicator.vhd
SOURCE project.vhd
SOURCE testmachine.vhd
SOURCE and_ent.vhd
SOURCE buf8.vhd
SOURCE dec2to4.vhd
SOURCE or1_ent.vhd
SOURCE or2_ent.vhd
SOURCE reg8.vhd
SOURCE sreg8.vhd
STIMULUS testProject.tbw
STIMULUS test1.tbw
STIMULUS test2.tbw
DEPASSOC fsm fsm.ucf
[STATUS-ALL]
fsm.ngcFile=WARNINGS,1182848354
fsm.postMapVHDLSimModel=WARNINGS,1182854170
indicator.ngcFile=WARNINGS,1182852021
project.ngcFile=WARNINGS,1182852100
testmachine.ngcFile=WARNINGS,1182852236
[STRATEGY-LIST]
Normal=True