hdpdeps.ref

vhdl source vhdl source vhdl source vhdl source vhdl source vhdl source vhdl source vhdl source vhd

V3 15
EN work/CD4CE_MXILINX_count_4 0 FL $XILINX/ISEexamples/count_4/count_4.vhf \
      PB ieee/std_logic_1164 1163575071 PH ieee/NUMERIC_STD 1163575073 LB UNISIM \
      PH unisim/VCOMPONENTS 1163575076
AR work/CD4CE_MXILINX_count_4/BEHAVIORAL 0 \
      FL $XILINX/ISEexamples/count_4/count_4.vhf EN work/CD4CE_MXILINX_count_4 0 \
      CP AND3 CP XOR2 CP OR2 CP AND2 CP AND2B1 CP INV CP AND4B2 CP FDCE
EN work/count_4 0 \
      FL $XILINX/ISEexamples/count_4/count_4.vhf PB ieee/std_logic_1164 1163575071 \
      PH ieee/NUMERIC_STD 1163575073 LB UNISIM PH unisim/VCOMPONENTS 1163575076
AR work/count_4/BEHAVIORAL 0 \
      FL $XILINX/ISEexamples/count_4/count_4.vhf EN work/count_4 0 \
      CP CD4CE_MXILINX_count_4