step_a.tan.rpt

来自「基于FPGA的直流电机的PWM控制和步进电机的细分驱动控制。使用VHDL语言编写」· RPT 代码 · 共 197 行 · 第 1/5 页

Timing Analyzer report for step_a
Tue Oct 11 21:43:55 2005
Version 5.0 Build 148 04/26/2005 SJ Full Version


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; Table of Contents ;
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  1. Legal Notice
  2. Timing Analyzer Summary
  3. Timing Analyzer Settings
  4. Clock Settings Summary
  5. Clock Setup: 'clk5'
  6. Clock Setup: 'D_STP'
  7. Clock Setup: 'clk0'
  8. Clock Setup: 'altera_internal_jtag~TCKUTAP'
  9. tsu
 10. tco
 11. tpd
 12. th
 13. Minimum tco
 14. Minimum tpd
 15. Timing Analyzer Messages



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; Legal Notice ;
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without limitation, that your use is for the sole purpose of   
programming logic devices manufactured by Altera and sold by