step_a.asm.rpt

来自「基于FPGA的直流电机的PWM控制和步进电机的细分驱动控制。使用VHDL语言编写」· RPT 代码 · 共 126 行

Assembler report for step_a
Tue Oct 11 21:43:51 2005
Version 5.0 Build 148 04/26/2005 SJ Full Version


---------------------
; Table of Contents ;
---------------------
  1. Legal Notice
  2. Assembler Summary
  3. Assembler Settings
  4. Assembler Generated Files
  5. Assembler Device Options: E:/GW48-PK3/EDA新板子/Chpt12_vga_moto/EP1C3_12_1_2_MOTO/step_a.sof
  6. Assembler Device Options: E:/GW48-PK3/EDA新板子/Chpt12_vga_moto/EP1C3_12_1_2_MOTO/step_a.pof
  7. Assembler Messages



----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2005 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic       
functions, and any output files any of the foregoing           
(including device programming or simulation files), and any    
associated documentation or information are expressly subject  
to the terms and conditions of the Altera Program License      
Subscription Agreement, Altera MegaCore Function License       
Agreement, or other applicable license agreement, including,   
without limitation, that your use is for the sole purpose of   
programming logic devices manufactured by Altera and sold by   
Altera or its authorized distributors.  Please refer to the    
applicable agreement for further details.



+---------------------------------------------------------------+
; Assembler Summary                                             ;
+-----------------------+---------------------------------------+
; Assembler Status      ; Successful - Tue Oct 11 21:43:51 2005 ;
; Revision Name         ; step_a                                ;
; Top-level Entity Name ; step_a                                ;
; Family                ; Cyclone                               ;
; Device                ; EP1C3T144C8                           ;
+-----------------------+---------------------------------------+


+-----------------------------------------------------------------------------------------------------------+
; Assembler Settings                                                                                        ;
+--------------------------------------------------------------------------------+----------+---------------+
; Option                                                                         ; Setting  ; Default Value ;
+--------------------------------------------------------------------------------+----------+---------------+
; Auto-restart configuration after error                                         ; Off      ; On            ;
; Use smart compilation                                                          ; Off      ; Off           ;
; Generate Serial Vector Format File (.svf) for Target Device                    ; Off      ; Off           ;
; Generate a JEDEC STAPL Format File (.jam) for Target Device                    ; Off      ; Off           ;
; Generate an uncompressed Jam STAPL Byte Code 2.0 File (.jbc) for Target Device ; Off      ; Off           ;
; Generate a compressed Jam STAPL Byte Code 2.0 File (.jbc) for Target Device    ; On       ; On            ;
; Generate compressed bitstreams                                                 ; on       ; on            ;
; Compression mode                                                               ; Off      ; Off           ;
; Clock source for configuration device                                          ; Internal ; Internal      ;
; Clock frequency of the configuration device                                    ; 10 MHz   ; 10 MHz        ;
; Divide clock frequency by                                                      ; 1        ; 1             ;
; JTAG user code for target device                                               ; Ffffffff ; Ffffffff      ;
; Auto user code                                                                 ; off      ; off           ;
; Use configuration device                                                       ; On       ; On            ;
; Configuration device                                                           ; Auto     ; Auto          ;
; JTAG user code for configuration device                                        ; Ffffffff ; Ffffffff      ;
; Configuration device auto user code                                            ; off      ; off           ;
; Auto-increment JTAG user code for multiple configuration devices               ; On       ; On            ;
; Generate Tabular Text File (.ttf) For Target Device                            ; Off      ; Off           ;
; Generate Raw Binary File (.rbf) For Target Device                              ; Off      ; Off           ;
; Generate Hexadecimal (Intel-Format) Output File (.hexout) for Target Device    ; Off      ; Off           ;
; Hexadecimal Output File start address                                          ; 0        ; 0             ;
; Hexadecimal Output File count direction                                        ; Up       ; Up            ;
; Release clears before tri-states                                               ; off      ; off           ;
+--------------------------------------------------------------------------------+----------+---------------+


+--------------------------------------------------------------------+
; Assembler Generated Files                                          ;
+--------------------------------------------------------------------+
; File Name                                                          ;
+--------------------------------------------------------------------+
; E:/GW48-PK3/EDA新板子/Chpt12_vga_moto/EP1C3_12_1_2_MOTO/step_a.sof ;
; E:/GW48-PK3/EDA新板子/Chpt12_vga_moto/EP1C3_12_1_2_MOTO/step_a.pof ;
+--------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------+
; Assembler Device Options: E:/GW48-PK3/EDA新板子/Chpt12_vga_moto/EP1C3_12_1_2_MOTO/step_a.sof ;
+----------------+-----------------------------------------------------------------------------+
; Option         ; Setting                                                                     ;
+----------------+-----------------------------------------------------------------------------+
; Device         ; EP1C3T144C8                                                                 ;
; JTAG usercode  ; 0xFFFFFFFF                                                                  ;
; Checksum       ; 0x000A10D9                                                                  ;
+----------------+-----------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------+
; Assembler Device Options: E:/GW48-PK3/EDA新板子/Chpt12_vga_moto/EP1C3_12_1_2_MOTO/step_a.pof ;
+----------------+-----------------------------------------------------------------------------+
; Option         ; Setting                                                                     ;
+----------------+-----------------------------------------------------------------------------+
; Device         ; EPCS1                                                                       ;
; JTAG usercode  ; 0x00000000                                                                  ;
; Checksum       ; 0x01A08F1B                                                                  ;
+----------------+-----------------------------------------------------------------------------+


+--------------------+
; Assembler Messages ;
+--------------------+
Info: *******************************************************************
Info: Running Quartus II Assembler
    Info: Version 5.0 Build 148 04/26/2005 SJ Full Version
    Info: Processing started: Tue Oct 11 21:43:50 2005
Info: Command: quartus_asm --read_settings_files=off --write_settings_files=off STEP_A -c step_a
Info: Quartus II Assembler was successful. 0 errors, 0 warnings
    Info: Processing ended: Tue Oct 11 21:43:51 2005
    Info: Elapsed time: 00:00:02