adder.fit.summary

本设计是用32位的并行全加器的,可以实现浮点运算!

Fitter Status : Successful - Wed May 27 11:54:51 2009
Quartus II Version : 8.0 Build 215 05/29/2008 SJ Web Edition
Revision Name : ADDER
Top-level Entity Name : ADDER
Family : Cyclone
Device : EP1C6Q240C8
Timing Models : Final
Total logic elements : 32 / 5,980 ( < 1 % )
Total pins : 97 / 185 ( 52 % )
Total virtual pins : 0
Total memory bits : 0 / 92,160 ( 0 % )
Total PLLs : 0 / 2 ( 0 % )