mul11.vhd

bch 编码和译码

--------------------------------------------------------------------------------
-- Company: 
-- Engineer:
--
-- Create Date:    10:05:41 04/09/08
-- Design Name:    
-- Module Name:    mul11 - Behavioral
-- Project Name:   
-- Target Device:  
-- Tool versions:  
-- Description:
--
-- Dependencies:
-- 
-- Revision:
-- Revision 0.01 - File Created
-- Additional Comments:
-- 
--------------------------------------------------------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

---- Uncomment the following library declaration if instantiating
---- any Xilinx primitives in this code.
--library UNISIM;
--use UNISIM.VComponents.all;

entity mul11 is
	port(
		mul11_in:in std_logic_vector(12 downto 0);	  --msb_lsb
		mul11_out:out std_logic_vector(12 downto 0)
		);
end mul11;

architecture Behavioral of mul11 is

begin

mul11_out(0)<=mul11_in(2) xor mul11_in(12) xor mul11_in(11);
mul11_out(1)<=mul11_in(3) xor mul11_in(2) xor mul11_in(11);
mul11_out(2)<=mul11_in(4) xor mul11_in(12) xor mul11_in(3);
mul11_out(3)<=mul11_in(11) xor mul11_in(12) xor mul11_in(5) xor mul11_in(4) xor mul11_in(2);
mul11_out(4)<=mul11_in(11) xor mul11_in(3) xor mul11_in(5) xor mul11_in(6) xor mul11_in(2);
mul11_out(5)<=mul11_in(4) xor mul11_in(6) xor mul11_in(12) xor mul11_in(7) xor mul11_in(3);
mul11_out(6)<=mul11_in(5) xor mul11_in(8) xor mul11_in(4) xor mul11_in(7);
mul11_out(7)<=mul11_in(6) xor mul11_in(8) xor mul11_in(9) xor mul11_in(5);
mul11_out(8)<=mul11_in(7) xor mul11_in(9) xor mul11_in(10) xor mul11_in(6);
mul11_out(9)<=mul11_in(11) xor mul11_in(10) xor mul11_in(8) xor mul11_in(7);
mul11_out(10)<=mul11_in(11) xor mul11_in(9) xor mul11_in(12) xor mul11_in(8);
mul11_out(11)<=mul11_in(12) xor mul11_in(0) xor mul11_in(10) xor mul11_in(9);
mul11_out(12)<=mul11_in(11) xor mul11_in(10) xor mul11_in(1);

end Behavioral;