led7.vhd

分析二进制乘法中计算步骤（多少次加法

library ieee;
use ieee.std_logic_1164.all;

entity led7 is
  port (a:in std_logic_vector(7 downto 0);
        en:in std_logic;
        led:out std_logic_vector(6 downto 0));
end led7;

architecture state of led7 is
begin
  process(en,a)
    begin
     if(en='1') then
    case a(7 downto 0) is
    when "00000000"=>led<="1000000";
    when "00000001"=>led<="0110000";
    when "00000010"=>led<="1101101";
    when "00000011"=>led<="1111001";
    when "00000100"=>led<="1110010";
    when "00000101"=>led<="1011011";
    when "00000110"=>led<="1011111";
    when "00000111"=>led<="0110001";
    when "00001000"=>led<="1111111";
    when "00001001"=>led<="1111011";
    when "00001010"=>led<="1110111";
    when "00001011"=>led<="1011110";
    when "00001100"=>led<="0001111";
    when "00001101"=>led<="1111100";
    when "00001110"=>led<="1001111";
    when "00001111"=>led<="1000111";
    when others =>NULL;
    end case;
     end if;
  end process;
end state;