exp9.vho

四人抢答器

\Y[0]~I\ : cycloneii_io
-- pragma translate_off
-- GENERIC MAP (
--	operation_mode => "input",
--	input_register_mode => "none",
--	output_register_mode => "none",
--	oe_register_mode => "none",
--	input_async_reset => "none",
--	output_async_reset => "none",
--	oe_async_reset => "none",
--	input_sync_reset => "none",
--	output_sync_reset => "none",
--	oe_sync_reset => "none",
--	input_power_up => "low",
--	output_power_up => "low",
--	oe_power_up => "low")
-- pragma translate_on
PORT MAP (
	datain => GND,
	oe => GND,
	outclk => GND,
	outclkena => VCC,
	inclk => GND,
	inclkena => VCC,
	areset => GND,
	sreset => GND,
	differentialin => GND,
	linkin => GND,
	modesel => \Y[0]~I_modesel\,
	combout => \Y[0]~combout\,
	padio => ww_Y(0));

\X[0]~I\ : cycloneii_io
-- pragma translate_off
-- GENERIC MAP (
--	operation_mode => "input",
--	input_register_mode => "none",
--	output_register_mode => "none",
--	oe_register_mode => "none",
--	input_async_reset => "none",
--	output_async_reset => "none",
--	oe_async_reset => "none",
--	input_sync_reset => "none",
--	output_sync_reset => "none",
--	oe_sync_reset => "none",
--	input_power_up => "low",
--	output_power_up => "low",
--	oe_power_up => "low")
-- pragma translate_on
PORT MAP (
	datain => GND,
	oe => GND,
	outclk => GND,
	outclkena => VCC,
	inclk => GND,
	inclkena => VCC,
	areset => GND,
	sreset => GND,
	differentialin => GND,
	linkin => GND,
	modesel => \X[0]~I_modesel\,
	combout => \X[0]~combout\,
	padio => ww_X(0));

\result~0_I\ : cycloneii_lcell_comb
-- Equation(s):
-- \result~0\ = \Y[0]~combout\ $ \X[0]~combout\

-- pragma translate_off
-- GENERIC MAP (
--	sum_lutc_input => "datac",
--	lut_mask => "0011001111001100")
-- pragma translate_on
PORT MAP (
	pathsel => \result~0_I_pathsel\,
	dataa => VCC,
	datab => \Y[0]~combout\,
	datac => VCC,
	datad => \X[0]~combout\,
	cin => GND,
	modesel => \result~0_I_modesel\,
	combout => \result~0\);

\Y[1]~I\ : cycloneii_io
-- pragma translate_off
-- GENERIC MAP (
--	operation_mode => "input",
--	input_register_mode => "none",
--	output_register_mode => "none",
--	oe_register_mode => "none",
--	input_async_reset => "none",
--	output_async_reset => "none",
--	oe_async_reset => "none",
--	input_sync_reset => "none",
--	output_sync_reset => "none",
--	oe_sync_reset => "none",
--	input_power_up => "low",
--	output_power_up => "low",
--	oe_power_up => "low")
-- pragma translate_on
PORT MAP (
	datain => GND,
	oe => GND,
	outclk => GND,
	outclkena => VCC,
	inclk => GND,
	inclkena => VCC,
	areset => GND,
	sreset => GND,
	differentialin => GND,
	linkin => GND,
	modesel => \Y[1]~I_modesel\,
	combout => \Y[1]~combout\,
	padio => ww_Y(1));

\X[1]~I\ : cycloneii_io
-- pragma translate_off
-- GENERIC MAP (
--	operation_mode => "input",
--	input_register_mode => "none",
--	output_register_mode => "none",
--	oe_register_mode => "none",
--	input_async_reset => "none",
--	output_async_reset => "none",
--	oe_async_reset => "none",
--	input_sync_reset => "none",
--	output_sync_reset => "none",
--	oe_sync_reset => "none",
--	input_power_up => "low",
--	output_power_up => "low",
--	oe_power_up => "low")
-- pragma translate_on
PORT MAP (
	datain => GND,
	oe => GND,
	outclk => GND,
	outclkena => VCC,
	inclk => GND,
	inclkena => VCC,
	areset => GND,
	sreset => GND,
	differentialin => GND,
	linkin => GND,
	modesel => \X[1]~I_modesel\,
	combout => \X[1]~combout\,
	padio => ww_X(1));

\result~221_I\ : cycloneii_lcell_comb
-- Equation(s):
-- \result~221\ = \Y[1]~combout\ $ \X[1]~combout\ $ (\Y[0]~combout\ & \X[0]~combout\)

-- pragma translate_off
-- GENERIC MAP (
--	sum_lutc_input => "datac",
--	lut_mask => "1001011001011010")
-- pragma translate_on
PORT MAP (
	pathsel => \result~221_I_pathsel\,
	dataa => \Y[1]~combout\,
	datab => \Y[0]~combout\,
	datac => \X[1]~combout\,
	datad => \X[0]~combout\,
	cin => GND,
	modesel => \result~221_I_modesel\,
	combout => \result~221\);

\Y[2]~I\ : cycloneii_io
-- pragma translate_off
-- GENERIC MAP (
--	operation_mode => "input",
--	input_register_mode => "none",
--	output_register_mode => "none",
--	oe_register_mode => "none",
--	input_async_reset => "none",
--	output_async_reset => "none",
--	oe_async_reset => "none",
--	input_sync_reset => "none",
--	output_sync_reset => "none",
--	oe_sync_reset => "none",
--	input_power_up => "low",
--	output_power_up => "low",
--	oe_power_up => "low")
-- pragma translate_on
PORT MAP (
	datain => GND,
	oe => GND,
	outclk => GND,
	outclkena => VCC,
	inclk => GND,
	inclkena => VCC,
	areset => GND,
	sreset => GND,
	differentialin => GND,
	linkin => GND,
	modesel => \Y[2]~I_modesel\,
	combout => \Y[2]~combout\,
	padio => ww_Y(2));

\X[2]~I\ : cycloneii_io
-- pragma translate_off
-- GENERIC MAP (
--	operation_mode => "input",
--	input_register_mode => "none",
--	output_register_mode => "none",
--	oe_register_mode => "none",
--	input_async_reset => "none",
--	output_async_reset => "none",
--	oe_async_reset => "none",
--	input_sync_reset => "none",
--	output_sync_reset => "none",
--	oe_sync_reset => "none",
--	input_power_up => "low",
--	output_power_up => "low",
--	oe_power_up => "low")
-- pragma translate_on
PORT MAP (
	datain => GND,
	oe => GND,
	outclk => GND,
	outclkena => VCC,
	inclk => GND,
	inclkena => VCC,
	areset => GND,
	sreset => GND,
	differentialin => GND,
	linkin => GND,
	modesel => \X[2]~I_modesel\,
	combout => \X[2]~combout\,
	padio => ww_X(2));

\S2~18_I\ : cycloneii_lcell_comb
-- Equation(s):
-- \S2~18\ = \Y[1]~combout\ & (\X[1]~combout\ # \Y[0]~combout\ & \X[0]~combout\) # !\Y[1]~combout\ & \Y[0]~combout\ & \X[1]~combout\ & \X[0]~combout\

-- pragma translate_off
-- GENERIC MAP (
--	sum_lutc_input => "datac",
--	lut_mask => "1110100010100000")
-- pragma translate_on
PORT MAP (
	pathsel => \S2~18_I_pathsel\,
	dataa => \Y[1]~combout\,
	datab => \Y[0]~combout\,
	datac => \X[1]~combout\,
	datad => \X[0]~combout\,
	cin => GND,
	modesel => \S2~18_I_modesel\,
	combout => \S2~18\);

\result~222_I\ : cycloneii_lcell_comb
-- Equation(s):
-- \result~222\ = \Y[2]~combout\ $ \X[2]~combout\ $ \S2~18\

-- pragma translate_off
-- GENERIC MAP (
--	sum_lutc_input => "datac",
--	lut_mask => "1100001100111100")
-- pragma translate_on
PORT MAP (
	pathsel => \result~222_I_pathsel\,
	dataa => VCC,
	datab => \Y[2]~combout\,
	datac => \X[2]~combout\,
	datad => \S2~18\,
	cin => GND,
	modesel => \result~222_I_modesel\,
	combout => \result~222\);

\X[3]~I\ : cycloneii_io
-- pragma translate_off
-- GENERIC MAP (
--	operation_mode => "input",
--	input_register_mode => "none",
--	output_register_mode => "none",
--	oe_register_mode => "none",
--	input_async_reset => "none",
--	output_async_reset => "none",
--	oe_async_reset => "none",
--	input_sync_reset => "none",
--	output_sync_reset => "none",
--	oe_sync_reset => "none",
--	input_power_up => "low",
--	output_power_up => "low",
--	oe_power_up => "low")
-- pragma translate_on
PORT MAP (
	datain => GND,
	oe => GND,
	outclk => GND,
	outclkena => VCC,
	inclk => GND,
	inclkena => VCC,
	areset => GND,
	sreset => GND,
	differentialin => GND,
	linkin => GND,
	modesel => \X[3]~I_modesel\,
	combout => \X[3]~combout\,
	padio => ww_X(3));

\S3~68_I\ : cycloneii_lcell_comb
-- Equation(s):
-- \S3~68\ = \X[2]~combout\ & \S2~18\

-- pragma translate_off
-- GENERIC MAP (
--	sum_lutc_input => "datac",
--	lut_mask => "1111000000000000")
-- pragma translate_on
PORT MAP (
	pathsel => \S3~68_I_pathsel\,
	dataa => VCC,
	datab => VCC,
	datac => \X[2]~combout\,
	datad => \S2~18\,
	cin => GND,
	modesel => \S3~68_I_modesel\,
	combout => \S3~68\);

\Y[3]~I\ : cycloneii_io
-- pragma translate_off
-- GENERIC MAP (
--	operation_mode => "input",
--	input_register_mode => "none",
--	output_register_mode => "none",
--	oe_register_mode => "none",
--	input_async_reset => "none",
--	output_async_reset => "none",
--	oe_async_reset => "none",
--	input_sync_reset => "none",
--	output_sync_reset => "none",
--	oe_sync_reset => "none",
--	input_power_up => "low",
--	output_power_up => "low",
--	oe_power_up => "low")
-- pragma translate_on
PORT MAP (
	datain => GND,
	oe => GND,
	outclk => GND,
	outclkena => VCC,
	inclk => GND,
	inclkena => VCC,
	areset => GND,
	sreset => GND,
	differentialin => GND,
	linkin => GND,
	modesel => \Y[3]~I_modesel\,
	combout => \Y[3]~combout\,
	padio => ww_Y(3));

\S3~67_I\ : cycloneii_lcell_comb
-- Equation(s):
-- \S3~67\ = \Y[2]~combout\ & (\X[2]~combout\ # \S2~18\)

-- pragma translate_off
-- GENERIC MAP (
--	sum_lutc_input => "datac",
--	lut_mask => "1100110011000000")
-- pragma translate_on
PORT MAP (
	pathsel => \S3~67_I_pathsel\,
	dataa => VCC,
	datab => \Y[2]~combout\,
	datac => \X[2]~combout\,
	datad => \S2~18\,
	cin => GND,
	modesel => \S3~67_I_modesel\,
	combout => \S3~67\);

\result~3_I\ : cycloneii_lcell_comb
-- Equation(s):
-- \result~3\ = \X[3]~combout\ $ \Y[3]~combout\ $ (\S3~68\ # \S3~67\)

-- pragma translate_off
-- GENERIC MAP (
--	sum_lutc_input => "datac",
--	lut_mask => "1010010110010110")
-- pragma translate_on
PORT MAP (
	pathsel => \result~3_I_pathsel\,
	dataa => \X[3]~combout\,
	datab => \S3~68\,
	datac => \Y[3]~combout\,
	datad => \S3~67\,
	cin => GND,
	modesel => \result~3_I_modesel\,
	combout => \result~3\);

\result~223_I\ : cycloneii_lcell_comb
-- Equation(s):
-- \result~223\ = \X[3]~combout\ & (\S3~68\ # \Y[3]~combout\ # \S3~67\) # !\X[3]~combout\ & \Y[3]~combout\ & (\S3~68\ # \S3~67\)

-- pragma translate_off
-- GENERIC MAP (
--	sum_lutc_input => "datac",
--	lut_mask => "1111101011101000")
-- pragma translate_on
PORT MAP (
	pathsel => \result~223_I_pathsel\,
	dataa => \X[3]~combout\,
	datab => \S3~68\,
	datac => \Y[3]~combout\,
	datad => \S3~67\,
	cin => GND,
	modesel => \result~223_I_modesel\,
	combout => \result~223\);

\Clk~I\ : cycloneii_io
-- pragma translate_off
-- GENERIC MAP (
--	operation_mode => "input",
--	input_register_mode => "none",
--	output_register_mode => "none",
--	oe_register_mode => "none",
--	input_async_reset => "none",
--	output_async_reset => "none",
--	oe_async_reset => "none",
--	input_sync_reset => "none",
--	output_sync_reset => "none",
--	oe_sync_reset => "none",
--	input_power_up => "low",
--	output_power_up => "low",
--	oe_power_up => "low")
-- pragma translate_on
PORT MAP (
	datain => GND,
	oe => GND,
	outclk => GND,
	outclkena => VCC,
	inclk => GND,
	inclkena => VCC,
	areset => GND,
	sreset => GND,
	differentialin => GND,
	linkin => GND,
	modesel => \Clk~I_modesel\,
	combout => \Clk~combout\,
	padio => ww_Clk);

\Clk~clkctrl_I\ : cycloneii_clkctrl
-- pragma translate_off
-- GENERIC MAP (
--	clock_type => "Global Clock",
--	ena_register_mode => "falling edge")
-- pragma translate_on
PORT MAP (
	ena => VCC,
	inclk => \Clk~clkctrl_I_INCLK_bus\,
	clkselect => GNDs(1 DOWNTO 0),
	modesel => \Clk~clkctrl_I_modesel\,
	outclk => \Clk~clkctrl\);

\SEG_SEL[0]~16_I\ : cycloneii_lcell_comb
-- Equation(s):
-- \SEG_SEL[0]~16\ = !\SEG_SEL[0]~reg0\

-- pragma translate_off
-- GENERIC MAP (
--	sum_lutc_input => "datac",
--	lut_mask => "0000111100001111")
-- pragma translate_on
PORT MAP (
	pathsel => \SEG_SEL[0]~16_I_pathsel\,
	dataa => VCC,
	datab => VCC,
	datac => \SEG_SEL[0]~reg0\,
	datad => VCC,
	cin => GND,
	modesel => \SEG_SEL[0]~16_I_modesel\,
	combout => \SEG_SEL[0]~16\);

\SEG_SEL[0]~reg0_I\ : cycloneii_lcell_ff
PORT MAP (
	clk => \Clk~clkctrl\,
	datain => \SEG_SEL[0]~16\,
	sdata => GND,
	aclr => GND,