exp9.fit.eqn

四人抢答器

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--A1L38 is result~0 at LCCOMB_X25_Y1_N16
A1L38 = Y[0] $ X[0];


--A1L40 is result~221 at LCCOMB_X25_Y1_N26
A1L40 = Y[1] $ X[1] $ (Y[0] & X[0]);


--A1L43 is S2~18 at LCCOMB_X25_Y1_N12
A1L43 = Y[1] & (X[1] # Y[0] & X[0]) # !Y[1] & Y[0] & X[1] & X[0];


--A1L41 is result~222 at LCCOMB_X25_Y1_N10
A1L41 = Y[2] $ X[2] $ A1L43;


--A1L44 is S3~67 at LCCOMB_X25_Y1_N6
A1L44 = Y[2] & (X[2] # A1L43);


--A1L45 is S3~68 at LCCOMB_X25_Y1_N0
A1L45 = X[2] & A1L43;


--A1L39 is result~3 at LCCOMB_X25_Y1_N2
A1L39 = X[3] $ Y[3] $ (A1L45 # A1L44);


--A1L42 is result~223 at LCCOMB_X25_Y1_N22
A1L42 = X[3] & (A1L45 # Y[3] # A1L44) # !X[3] & Y[3] & (A1L45 # A1L44);


--A1L49Q is SEG_SEL[0]~reg0 at LCFF_X27_Y1_N19
A1L49Q = DFFEAS(A1L48, GLOBAL(A1L3),  ,  ,  ,  ,  ,  ,  );


--A1L51Q is SEG_SEL[1]~reg0 at LCFF_X27_Y1_N25
A1L51Q = DFFEAS(A1L1, GLOBAL(A1L3),  ,  ,  ,  ,  ,  ,  );


--A1L54Q is SEG_SEL[2]~reg0 at LCFF_X27_Y1_N3
A1L54Q = DFFEAS(A1L53, GLOBAL(A1L3),  ,  ,  ,  ,  ,  ,  );


--C1_q_a[0] is altsyncram:Disp_Decode_rtl_0|altsyncram_77l:auto_generated|q_a[0] at M4K_X26_Y1
--RAM Block Operation Mode: ROM
--Port A Depth: 16, Port A Width: 7
--Port A Logical Depth: 256, Port A Logical Width: 7
--Port A Input: Registered, Port A Output: Un-registered
C1_q_a[0]_PORT_A_address = BUS(A1L5, A1L11, A1L13, A1L16);
C1_q_a[0]_PORT_A_address_reg = DFFE(C1_q_a[0]_PORT_A_address, C1_q_a[0]_clock_0, , , );
C1_q_a[0]_clock_0 = GLOBAL(A1L3);
C1_q_a[0]_PORT_A_data_out = MEMORY(, , C1_q_a[0]_PORT_A_address_reg, , , , , , C1_q_a[0]_clock_0, , , , , );
C1_q_a[0] = C1_q_a[0]_PORT_A_data_out[0];

--C1_q_a[6] is altsyncram:Disp_Decode_rtl_0|altsyncram_77l:auto_generated|q_a[6] at M4K_X26_Y1
C1_q_a[0]_PORT_A_address = BUS(A1L5, A1L11, A1L13, A1L16);
C1_q_a[0]_PORT_A_address_reg = DFFE(C1_q_a[0]_PORT_A_address, C1_q_a[0]_clock_0, , , );
C1_q_a[0]_clock_0 = GLOBAL(A1L3);
C1_q_a[0]_PORT_A_data_out = MEMORY(, , C1_q_a[0]_PORT_A_address_reg, , , , , , C1_q_a[0]_clock_0, , , , , );
C1_q_a[6] = C1_q_a[0]_PORT_A_data_out[6];

--C1_q_a[5] is altsyncram:Disp_Decode_rtl_0|altsyncram_77l:auto_generated|q_a[5] at M4K_X26_Y1
C1_q_a[0]_PORT_A_address = BUS(A1L5, A1L11, A1L13, A1L16);
C1_q_a[0]_PORT_A_address_reg = DFFE(C1_q_a[0]_PORT_A_address, C1_q_a[0]_clock_0, , , );
C1_q_a[0]_clock_0 = GLOBAL(A1L3);
C1_q_a[0]_PORT_A_data_out = MEMORY(, , C1_q_a[0]_PORT_A_address_reg, , , , , , C1_q_a[0]_clock_0, , , , , );
C1_q_a[5] = C1_q_a[0]_PORT_A_data_out[5];

--C1_q_a[4] is altsyncram:Disp_Decode_rtl_0|altsyncram_77l:auto_generated|q_a[4] at M4K_X26_Y1
C1_q_a[0]_PORT_A_address = BUS(A1L5, A1L11, A1L13, A1L16);
C1_q_a[0]_PORT_A_address_reg = DFFE(C1_q_a[0]_PORT_A_address, C1_q_a[0]_clock_0, , , );
C1_q_a[0]_clock_0 = GLOBAL(A1L3);
C1_q_a[0]_PORT_A_data_out = MEMORY(, , C1_q_a[0]_PORT_A_address_reg, , , , , , C1_q_a[0]_clock_0, , , , , );
C1_q_a[4] = C1_q_a[0]_PORT_A_data_out[4];

--C1_q_a[3] is altsyncram:Disp_Decode_rtl_0|altsyncram_77l:auto_generated|q_a[3] at M4K_X26_Y1
C1_q_a[0]_PORT_A_address = BUS(A1L5, A1L11, A1L13, A1L16);
C1_q_a[0]_PORT_A_address_reg = DFFE(C1_q_a[0]_PORT_A_address, C1_q_a[0]_clock_0, , , );
C1_q_a[0]_clock_0 = GLOBAL(A1L3);
C1_q_a[0]_PORT_A_data_out = MEMORY(, , C1_q_a[0]_PORT_A_address_reg, , , , , , C1_q_a[0]_clock_0, , , , , );
C1_q_a[3] = C1_q_a[0]_PORT_A_data_out[3];

--C1_q_a[2] is altsyncram:Disp_Decode_rtl_0|altsyncram_77l:auto_generated|q_a[2] at M4K_X26_Y1
C1_q_a[0]_PORT_A_address = BUS(A1L5, A1L11, A1L13, A1L16);
C1_q_a[0]_PORT_A_address_reg = DFFE(C1_q_a[0]_PORT_A_address, C1_q_a[0]_clock_0, , , );
C1_q_a[0]_clock_0 = GLOBAL(A1L3);
C1_q_a[0]_PORT_A_data_out = MEMORY(, , C1_q_a[0]_PORT_A_address_reg, , , , , , C1_q_a[0]_clock_0, , , , , );
C1_q_a[2] = C1_q_a[0]_PORT_A_data_out[2];

--C1_q_a[1] is altsyncram:Disp_Decode_rtl_0|altsyncram_77l:auto_generated|q_a[1] at M4K_X26_Y1
C1_q_a[0]_PORT_A_address = BUS(A1L5, A1L11, A1L13, A1L16);
C1_q_a[0]_PORT_A_address_reg = DFFE(C1_q_a[0]_PORT_A_address, C1_q_a[0]_clock_0, , , );
C1_q_a[0]_clock_0 = GLOBAL(A1L3);
C1_q_a[0]_PORT_A_data_out = MEMORY(, , C1_q_a[0]_PORT_A_address_reg, , , , , , C1_q_a[0]_clock_0, , , , , );
C1_q_a[1] = C1_q_a[0]_PORT_A_data_out[1];


--A1L1 is add~297 at LCCOMB_X27_Y1_N24
A1L1 = A1L51Q $ A1L49Q;


--A1L53 is SEG_SEL[2]~15 at LCCOMB_X27_Y1_N2
A1L53 = A1L54Q $ (A1L51Q & A1L49Q);


--A1L4 is Disp_Temp[0]~1340 at LCCOMB_X27_Y1_N20
A1L4 = A1L42 & (A1L39 & A1L41 & A1L40 # !A1L39 & !A1L41) # !A1L42 & A1L39 & (A1L41 # A1L40);


--A1L5 is Disp_Temp[0]~1341 at LCCOMB_X27_Y1_N8
A1L5 = A1L49Q & A1L4 & !A1L51Q # !A1L49Q & (A1L38 # !A1L51Q);


--A1L6 is Disp_Temp[0]~1342 at LCCOMB_X25_Y1_N18
A1L6 = A1L42 & (A1L41 # A1L39);


--A1L7 is Disp_Temp[1]~1343 at LCCOMB_X27_Y1_N14
A1L7 = A1L49Q # A1L40 & (!A1L42 # !A1L17);


--A1L27 is LessThan~581 at LCCOMB_X27_Y1_N30
A1L27 = !A1L41 & !A1L40 # !A1L39;


--A1L8 is Disp_Temp[1]~1344 at LCCOMB_X27_Y1_N6
A1L8 = !A1L49Q & !A1L42 & A1L27;


--A1L9 is Disp_Temp[1]~1345 at LCCOMB_X27_Y1_N0
A1L9 = A1L7 & (A1L6 # A1L40 & A1L8) # !A1L7 & A1L40 & (A1L8);


--A1L10 is Disp_Temp[1]~1346 at LCCOMB_X27_Y1_N28
A1L10 = !A1L6 & !A1L49Q & (A1L42 # !A1L27);


--A1L11 is Disp_Temp[1]~1347 at LCCOMB_X27_Y1_N16
A1L11 = A1L9 # A1L10 & !A1L40 # !A1L1;


--A1L12 is Disp_Temp[2]~1348 at LCCOMB_X27_Y1_N26
A1L12 = A1L42 & !A1L41 & (A1L39 # !A1L40) # !A1L42 & A1L41 & (A1L40 # !A1L39);


--A1L13 is Disp_Temp[2]~1349 at LCCOMB_X27_Y1_N12
A1L13 = A1L51Q & !A1L49Q & A1L12;


--A1L14 is Disp_Temp[3]~1350 at LCCOMB_X27_Y1_N22
A1L14 = !A1L49Q & A1L17 & A1L42 & !A1L40;


--A1L15 is Disp_Temp[3]~1351 at LCCOMB_X27_Y1_N4
A1L15 = A1L14 # A1L8 & A1L39 # !A1L1;


--A1L28 is LessThan~582 at LCCOMB_X25_Y1_N24
A1L28 = A1L40 # A1L43 $ Y[2] $ X[2];


--A1L16 is Disp_Temp[3]~1352 at LCCOMB_X27_Y1_N10
A1L16 = A1L15 # A1L10 & (A1L28 $ A1L39);


--A1L17 is Disp_Temp[3]~1353 at LCCOMB_X25_Y1_N20
A1L17 = A1L39 & (A1L43 $ Y[2] $ X[2]);


--A1L48 is SEG_SEL[0]~16 at LCCOMB_X27_Y1_N18
A1L48 = !A1L49Q;


--X[0] is X[0] at PIN_AA9
--operation mode is input

X[0] = INPUT();


--Y[0] is Y[0] at PIN_AB10
--operation mode is input

Y[0] = INPUT();


--X[1] is X[1] at PIN_AB8
--operation mode is input

X[1] = INPUT();


--Y[1] is Y[1] at PIN_AA10
--operation mode is input

Y[1] = INPUT();


--X[2] is X[2] at PIN_AD23
--operation mode is input

X[2] = INPUT();


--Y[2] is Y[2] at PIN_AA11
--operation mode is input

Y[2] = INPUT();


--X[3] is X[3] at PIN_AC22
--operation mode is input

X[3] = INPUT();


--Y[3] is Y[3] at PIN_AB12
--operation mode is input

Y[3] = INPUT();


--Clk is Clk at PIN_N2
--operation mode is input

Clk = INPUT();


--result[0] is result[0] at PIN_AA12
--operation mode is output

result[0] = OUTPUT(A1L38);


--result[1] is result[1] at PIN_AA13
--operation mode is output

result[1] = OUTPUT(A1L40);


--result[2] is result[2] at PIN_AA14
--operation mode is output

result[2] = OUTPUT(A1L41);


--result[3] is result[3] at PIN_AB15
--operation mode is output

result[3] = OUTPUT(A1L39);


--result[4] is result[4] at PIN_U18
--operation mode is output

result[4] = OUTPUT(A1L42);


--result[5] is result[5] at PIN_AA15
--operation mode is output

result[5] = OUTPUT(GND);


--result[6] is result[6] at PIN_AA16
--operation mode is output

result[6] = OUTPUT(GND);


--result[7] is result[7] at PIN_AA17
--operation mode is output

result[7] = OUTPUT(GND);


--SEG_SEL[0] is SEG_SEL[0] at PIN_U12
--operation mode is output

SEG_SEL[0] = OUTPUT(A1L49Q);


--SEG_SEL[1] is SEG_SEL[1] at PIN_V20
--operation mode is output

SEG_SEL[1] = OUTPUT(A1L51Q);


--SEG_SEL[2] is SEG_SEL[2] at PIN_V21
--operation mode is output

SEG_SEL[2] = OUTPUT(A1L54Q);


--Display[0] is Display[0] at PIN_V17
--operation mode is output

Display[0] = OUTPUT(C1_q_a[6]);


--Display[1] is Display[1] at PIN_W16
--operation mode is output

Display[1] = OUTPUT(C1_q_a[5]);


--Display[2] is Display[2] at PIN_W15
--operation mode is output

Display[2] = OUTPUT(C1_q_a[4]);


--Display[3] is Display[3] at PIN_L10
--operation mode is output

Display[3] = OUTPUT(C1_q_a[3]);


--Display[4] is Display[4] at PIN_V14
--operation mode is output

Display[4] = OUTPUT(C1_q_a[2]);


--Display[5] is Display[5] at PIN_V13
--operation mode is output

Display[5] = OUTPUT(C1_q_a[1]);


--Display[6] is Display[6] at PIN_W12
--operation mode is output

Display[6] = OUTPUT(C1_q_a[0]);


--Display[7] is Display[7] at PIN_P17
--operation mode is output

Display[7] = OUTPUT(GND);





--A1L3 is Clk~clkctrl at CLKCTRL_G2
A1L3 = cycloneii_clkctrl(.INCLK[0] = Clk) WITH (clock_type = "Global Clock");