vending_machine.tan.qmsg

自动售货机模型

{ "Info" "ITDB_FULL_TPD_RESULT" "quantity\[2\] show_quantity_data\[2\] 25.500 ns Longest " "Info: Longest tpd from source pin \"quantity\[2\]\" to destination pin \"show_quantity_data\[2\]\" is 25.500 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(3.100 ns) 3.100 ns quantity\[2\] 1 PIN PIN_176 5 " "Info: 1: + IC(0.000 ns) + CELL(3.100 ns) = 3.100 ns; Loc. = PIN_176; Fanout = 5; PIN Node = 'quantity\[2\]'" {  } { { "d:/program files/alter/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/alter/quartus/bin/TimingClosureFloorplan.fld" "" "" { quantity[2] } "NODE_NAME" } } { "vending_machine.vhd" "" { Text "D:/myproject/quarter/vending machine/vending_machine.vhd" 8 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(4.600 ns) + CELL(2.000 ns) 9.700 ns number\[2\]~2 2 COMB LC1_L24 7 " "Info: 2: + IC(4.600 ns) + CELL(2.000 ns) = 9.700 ns; Loc. = LC1_L24; Fanout = 7; COMB Node = 'number\[2\]~2'" {  } { { "d:/program files/alter/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/alter/quartus/bin/TimingClosureFloorplan.fld" "" "6.600 ns" { quantity[2] number[2]~2 } "NODE_NAME" } } { "vending_machine.vhd" "" { Text "D:/myproject/quarter/vending machine/vending_machine.vhd" 34 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.800 ns) + CELL(1.900 ns) 13.400 ns Mux18~0 3 COMB LC8_L25 1 " "Info: 3: + IC(1.800 ns) + CELL(1.900 ns) = 13.400 ns; Loc. = LC8_L25; Fanout = 1; COMB Node = 'Mux18~0'" {  } { { "d:/program files/alter/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/alter/quartus/bin/TimingClosureFloorplan.fld" "" "3.700 ns" { number[2]~2 Mux18~0 } "NODE_NAME" } } { "vending_machine.vhd" "" { Text "D:/myproject/quarter/vending machine/vending_machine.vhd" 181 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(3.500 ns) + CELL(8.600 ns) 25.500 ns show_quantity_data\[2\] 4 PIN PIN_136 0 " "Info: 4: + IC(3.500 ns) + CELL(8.600 ns) = 25.500 ns; Loc. = PIN_136; Fanout = 0; PIN Node = 'show_quantity_data\[2\]'" {  } { { "d:/program files/alter/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/alter/quartus/bin/TimingClosureFloorplan.fld" "" "12.100 ns" { Mux18~0 show_quantity_data[2] } "NODE_NAME" } } { "vending_machine.vhd" "" { Text "D:/myproject/quarter/vending machine/vending_machine.vhd" 11 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_CELL_DELAY" "15.600 ns ( 61.18 % ) " "Info: Total cell delay = 15.600 ns ( 61.18 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_IC_DELAY" "9.900 ns ( 38.82 % ) " "Info: Total interconnect delay = 9.900 ns ( 38.82 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 -1}  } { { "d:/program files/alter/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/alter/quartus/bin/TimingClosureFloorplan.fld" "" "25.500 ns" { quantity[2] number[2]~2 Mux18~0 show_quantity_data[2] } "NODE_NAME" } } { "d:/program files/alter/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/program files/alter/quartus/bin/Technology_Viewer.qrui" "25.500 ns" { quantity[2] {} quantity[2]~out {} number[2]~2 {} Mux18~0 {} show_quantity_data[2] {} } { 0.000ns 0.000ns 4.600ns 1.800ns 3.500ns } { 0.000ns 3.100ns 2.000ns 1.900ns 8.600ns } "" } }  } 0 0 "%4!s! tpd from source pin \"%1!s!\" to destination pin \"%2!s!\" is %3!s!" 0 0 "" 0 -1}
{ "Info" "ITDB_TH_RESULT" "buyer_money\[1\] set_init clk 4.600 ns register " "Info: th for register \"buyer_money\[1\]\" (data pin = \"set_init\", clock pin = \"clk\") is 4.600 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk destination 7.900 ns + Longest register " "Info: + Longest clock path from clock \"clk\" to destination register is 7.900 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.500 ns) 0.500 ns clk 1 CLK PIN_79 46 " "Info: 1: + IC(0.000 ns) + CELL(0.500 ns) = 0.500 ns; Loc. = PIN_79; Fanout = 46; CLK Node = 'clk'" {  } { { "d:/program files/alter/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/alter/quartus/bin/TimingClosureFloorplan.fld" "" "" { clk } "NODE_NAME" } } { "vending_machine.vhd" "" { Text "D:/myproject/quarter/vending machine/vending_machine.vhd" 9 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.400 ns) + CELL(1.100 ns) 3.000 ns insert_dollar 2 REG LC1_E23 4 " "Info: 2: + IC(1.400 ns) + CELL(1.100 ns) = 3.000 ns; Loc. = LC1_E23; Fanout = 4; REG Node = 'insert_dollar'" {  } { { "d:/program files/alter/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/alter/quartus/bin/TimingClosureFloorplan.fld" "" "2.500 ns" { clk insert_dollar } "NODE_NAME" } } { "vending_machine.vhd" "" { Text "D:/myproject/quarter/vending machine/vending_machine.vhd" 28 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(4.900 ns) + CELL(0.000 ns) 7.900 ns buyer_money\[1\] 3 REG LC1_E4 8 " "Info: 3: + IC(4.900 ns) + CELL(0.000 ns) = 7.900 ns; Loc. = LC1_E4; Fanout = 8; REG Node = 'buyer_money\[1\]'" {  } { { "d:/program files/alter/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/alter/quartus/bin/TimingClosureFloorplan.fld" "" "4.900 ns" { insert_dollar buyer_money[1] } "NODE_NAME" } } { "vending_machine.vhd" "" { Text "D:/myproject/quarter/vending machine/vending_machine.vhd" 30 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.600 ns ( 20.25 % ) " "Info: Total cell delay = 1.600 ns ( 20.25 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_IC_DELAY" "6.300 ns ( 79.75 % ) " "Info: Total interconnect delay = 6.300 ns ( 79.75 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 -1}  } { { "d:/program files/alter/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/alter/quartus/bin/TimingClosureFloorplan.fld" "" "7.900 ns" { clk insert_dollar buyer_money[1] } "NODE_NAME" } } { "d:/program files/alter/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/program files/alter/quartus/bin/Technology_Viewer.qrui" "7.900 ns" { clk {} clk~out {} insert_dollar {} buyer_money[1] {} } { 0.000ns 0.000ns 1.400ns 4.900ns } { 0.000ns 0.500ns 1.100ns 0.000ns } "" } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0 -1} { "Info" "ITDB_FULL_TH_DELAY" "0.900 ns + " "Info: + Micro hold delay of destination is 0.900 ns" {  } { { "vending_machine.vhd" "" { Text "D:/myproject/quarter/vending machine/vending_machine.vhd" 30 -1 0 } }  } 0 0 "%2!c! Micro hold delay of destination is %1!s!" 0 0 "" 0 -1} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "4.200 ns - Shortest pin register " "Info: - Shortest pin to register delay is 4.200 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.500 ns) 0.500 ns set_init 1 PIN PIN_78 42 " "Info: 1: + IC(0.000 ns) + CELL(0.500 ns) = 0.500 ns; Loc. = PIN_78; Fanout = 42; PIN Node = 'set_init'" {  } { { "d:/program files/alter/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/alter/quartus/bin/TimingClosureFloorplan.fld" "" "" { set_init } "NODE_NAME" } } { "vending_machine.vhd" "" { Text "D:/myproject/quarter/vending machine/vending_machine.vhd" 9 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(1.500 ns) + CELL(1.700 ns) 3.700 ns process_7~0 2 COMB LC3_E4 5 " "Info: 2: + IC(1.500 ns) + CELL(1.700 ns) = 3.700 ns; Loc. = LC3_E4; Fanout = 5; COMB Node = 'process_7~0'" {  } { { "d:/program files/alter/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/alter/quartus/bin/TimingClosureFloorplan.fld" "" "3.200 ns" { set_init process_7~0 } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_NODE_DELAY" "IC(0.200 ns) + CELL(0.300 ns) 4.200 ns buyer_money\[1\] 3 REG LC1_E4 8 " "Info: 3: + IC(0.200 ns) + CELL(0.300 ns) = 4.200 ns; Loc. = LC1_E4; Fanout = 8; REG Node = 'buyer_money\[1\]'" {  } { { "d:/program files/alter/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/alter/quartus/bin/TimingClosureFloorplan.fld" "" "0.500 ns" { process_7~0 buyer_money[1] } "NODE_NAME" } } { "vending_machine.vhd" "" { Text "D:/myproject/quarter/vending machine/vending_machine.vhd" 30 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.500 ns ( 59.52 % ) " "Info: Total cell delay = 2.500 ns ( 59.52 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 -1} { "Info" "ITDB_TOTAL_IC_DELAY" "1.700 ns ( 40.48 % ) " "Info: Total interconnect delay = 1.700 ns ( 40.48 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 -1}  } { { "d:/program files/alter/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/alter/quartus/bin/TimingClosureFloorplan.fld" "" "4.200 ns" { set_init process_7~0 buyer_money[1] } "NODE_NAME" } } { "d:/program files/alter/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/program files/alter/quartus/bin/Technology_Viewer.qrui" "4.200 ns" { set_init {} set_init~out {} process_7~0 {} buyer_money[1] {} } { 0.000ns 0.000ns 1.500ns 0.200ns } { 0.000ns 0.500ns 1.700ns 0.300ns } "" } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0 "" 0 -1}  } { { "d:/program files/alter/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/alter/quartus/bin/TimingClosureFloorplan.fld" "" "7.900 ns" { clk insert_dollar buyer_money[1] } "NODE_NAME" } } { "d:/program files/alter/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/program files/alter/quartus/bin/Technology_Viewer.qrui" "7.900 ns" { clk {} clk~out {} insert_dollar {} buyer_money[1] {} } { 0.000ns 0.000ns 1.400ns 4.900ns } { 0.000ns 0.500ns 1.100ns 0.000ns } "" } } { "d:/program files/alter/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/program files/alter/quartus/bin/TimingClosureFloorplan.fld" "" "4.200 ns" { set_init process_7~0 buyer_money[1] } "NODE_NAME" } } { "d:/program files/alter/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/program files/alter/quartus/bin/Technology_Viewer.qrui" "4.200 ns" { set_init {} set_init~out {} process_7~0 {} buyer_money[1] {} } { 0.000ns 0.000ns 1.500ns 0.200ns } { 0.000ns 0.500ns 1.700ns 0.300ns } "" } }  } 0 0 "th for %5!s! \"%1!s!\" (data pin = \"%2!s!\", clock pin = \"%3!s!\") is %4!s!" 0 0 "" 0 -1}
{ "Info" "IQEXE_ERROR_COUNT" "Classic Timing Analyzer 0 s 2 s Quartus II " "Info: Quartus II Classic Timing Analyzer was successful. 0 errors, 2 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "145 " "Info: Peak virtual memory: 145 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 -1} { "Info" "IQEXE_END_BANNER_TIME" "Sat May 16 23:01:58 2009 " "Info: Processing ended: Sat May 16 23:01:58 2009" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_TIME" "00:00:02 " "Info: Elapsed time: 00:00:02" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:02 " "Info: Total CPU time (on all processors): 00:00:02" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 -1}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 -1}