my_decode.ide_des

verilog 解码程序。。。。。。。。。。。。。。。。。。。。。。。

KEY IDE_DES_TOOL "Designer"
KEY IDE_DES_FAMILY "ProASIC3"
KEY IDE_DES_DIE "IQ2X1M0"
KEY IDE_DES_PACKAGE "vq100"
KEY IDE_DES_TOP_CELL_NAME "my_decode"
KEY IDE_DES_KEEP_PHY_CONSTR "TRUE"
KEY IDE_DES_KEEP_TIME_CONSTR "TRUE"
KEY IDE_DES_LAYOUT_DONE "TRUE"
KEY IDE_DES_BA_EXPORTED "FALSE"
KEY IDE_DES_ERROR_FOUND "FALSE"
KEY IDE_DES_ADB_PATH "E:\work\EasyFPGA030\my_decode\designer\impl1\my_decode.adb"
LIST SOURCE_FILES
VALUE "E:\work\EasyFPGA030\my_decode\synthesis\my_decode.edn;edn"
VALUE "E:\work\EasyFPGA030\my_decode\synthesis\my_decode_sdc.sdc;sdc"
ENDLIST
LIST OPTIONAL_FILES
ENDLIST
LIST VCD_FILES
ENDLIST