recv.hif

很多仪器都输出同步时钟

Version 5.0 Build 148 04/26/2005 SJ Full Version
32
1614
OFF
OFF
OFF
OFF
OFF
FV_OFF
VRSM_ON
VHSM_ON
0
# entity
shift_register1
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
shift_register1.vhd
1146365148
4
# storage
db|recv.(4).cnf
db|recv.(4).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
total_bit
69
PARAMETER_DEC
USR
}
# hierarchies {
shift_register1:U_SR1
}
# end
# entity
counter
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
counter.vhd
1147418583
4
# storage
db|recv.(2).cnf
db|recv.(2).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
max_count
66
PARAMETER_DEC
USR
}
# hierarchies {
counter:U_Counter1
}
# end
# entity
detector
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
detector.vhd
1147080423
4
# storage
db|recv.(3).cnf
db|recv.(3).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# include_file {
recv_package.vhd
1147938393
}
# hierarchies {
detector:U_Detector1
}
# end
# entity
parity_verifier1
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
parity_verifier1.vhd
1147929972
4
# storage
db|recv.(5).cnf
db|recv.(5).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
data_length
64
PARAMETER_DEC
USR
parity_rule
ODD
PARAMETER_ENUM
USR
}
# include_file {
recv_package.vhd
1147938393
}
# hierarchies {
parity_verifier1:U_PV1
}
# end
# entity
recv_top
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
recv_top.vhd
1147943163
4
# storage
db|recv.(0).cnf
db|recv.(0).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
data_bit
64
PARAMETER_DEC
DEF
total_bit
66
PARAMETER_DEC
DEF
}
# include_file {
recv_package.vhd
1147938393
}
# hierarchies {
|
}
# end
# entity
switch2
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
switch2.vhd
1147943334
4
# storage
db|recv.(6).cnf
db|recv.(6).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
switch2:U_sw
}
# end
# entity
recv_core
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
recv_core.vhd
1147953877
4
# storage
db|recv.(1).cnf
db|recv.(1).cnf
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
data_bit
64
PARAMETER_DEC
USR
total_bit
66
PARAMETER_DEC
USR
parity_rule
ODD
PARAMETER_ENUM
USR
}
# include_file {
recv_package.vhd
1147938393
}
# hierarchies {
recv_core:U_Core1
}
# end
# complete