send.tan.qmsg

来自「很多仪器都输出同步时钟」· QMSG 代码 · 共 11 行 · 第 1/3 页

{ "Info" "ITDB_TH_RESULT" "send_core:U_Core\|rdreq rdempty clk -4.870 ns register " "Info: th for register \"send_core:U_Core\|rdreq\" (data pin = \"rdempty\", clock pin = \"clk\") is -4.870 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk destination 2.954 ns + Longest register " "Info: + Longest clock path from clock \"clk\" to destination register is 2.954 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns clk 1 CLK PIN_29 90 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_29; Fanout = 90; CLK Node = 'clk'" {  } { { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "" { clk } "NODE_NAME" } "" } } { "send_top.vhd" "" { Text "E:/课题/预警/send/send_top.vhd" 13 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.774 ns) + CELL(0.711 ns) 2.954 ns send_core:U_Core\|rdreq 2 REG LC_X12_Y14_N6 2 " "Info: 2: + IC(0.774 ns) + CELL(0.711 ns) = 2.954 ns; Loc. = LC_X12_Y14_N6; Fanout = 2; REG Node = 'send_core:U_Core\|rdreq'" {  } { { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "1.485 ns" { clk send_core:U_Core|rdreq } "NODE_NAME" } "" } } { "send_core.vhd" "" { Text "E:/课题/预警/send/send_core.vhd" 18 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.180 ns 73.80 % " "Info: Total cell delay = 2.180 ns ( 73.80 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.774 ns 26.20 % " "Info: Total interconnect delay = 0.774 ns ( 26.20 % )" {  } {  } 0}  } { { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "2.954 ns" { clk send_core:U_Core|rdreq } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "2.954 ns" { clk clk~out0 send_core:U_Core|rdreq } { 0.000ns 0.000ns 0.774ns } { 0.000ns 1.469ns 0.711ns } } }  } 0} { "Info" "ITDB_FULL_TH_DELAY" "0.015 ns + " "Info: + Micro hold delay of destination is 0.015 ns" {  } { { "send_core.vhd" "" { Text "E:/课题/预警/send/send_core.vhd" 18 -1 0 } }  } 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "7.839 ns - Shortest pin register " "Info: - Shortest pin to register delay is 7.839 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.475 ns) 1.475 ns rdempty 1 PIN PIN_222 3 " "Info: 1: + IC(0.000 ns) + CELL(1.475 ns) = 1.475 ns; Loc. = PIN_222; Fanout = 3; PIN Node = 'rdempty'" {  } { { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "" { rdempty } "NODE_NAME" } "" } } { "send_top.vhd" "" { Text "E:/课题/预警/send/send_top.vhd" 15 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(5.886 ns) + CELL(0.478 ns) 7.839 ns send_core:U_Core\|rdreq 2 REG LC_X12_Y14_N6 2 " "Info: 2: + IC(5.886 ns) + CELL(0.478 ns) = 7.839 ns; Loc. = LC_X12_Y14_N6; Fanout = 2; REG Node = 'send_core:U_Core\|rdreq'" {  } { { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "6.364 ns" { rdempty send_core:U_Core|rdreq } "NODE_NAME" } "" } } { "send_core.vhd" "" { Text "E:/课题/预警/send/send_core.vhd" 18 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.953 ns 24.91 % " "Info: Total cell delay = 1.953 ns ( 24.91 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "5.886 ns 75.09 % " "Info: Total interconnect delay = 5.886 ns ( 75.09 % )" {  } {  } 0}  } { { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "7.839 ns" { rdempty send_core:U_Core|rdreq } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "7.839 ns" { rdempty rdempty~out0 send_core:U_Core|rdreq } { 0.000ns 0.000ns 5.886ns } { 0.000ns 1.475ns 0.478ns } } }  } 0}  } { { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "2.954 ns" { clk send_core:U_Core|rdreq } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "2.954 ns" { clk clk~out0 send_core:U_Core|rdreq } { 0.000ns 0.000ns 0.774ns } { 0.000ns 1.469ns 0.711ns } } } { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "7.839 ns" { rdempty send_core:U_Core|rdreq } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "7.839 ns" { rdempty rdempty~out0 send_core:U_Core|rdreq } { 0.000ns 0.000ns 5.886ns } { 0.000ns 1.475ns 0.478ns } } }  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Timing Analyzer 0 s 1  Quartus II " "Info: Quartus II Timing Analyzer was successful. 0 errors, 1 warning" { { "Info" "IQEXE_END_BANNER_TIME" "Mon May 22 15:09:30 2006 " "Info: Processing ended: Mon May 22 15:09:30 2006" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:02 " "Info: Elapsed time: 00:00:02" {  } {  } 0}  } {  } 0}