send.tan.qmsg

来自「很多仪器都输出同步时钟」· QMSG 代码 · 共 11 行 · 第 1/3 页

{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "clk register send_core:U_Core\|si_count\[3\] memory shift_register:U_SR\|altshift_taps:shift_regs_rtl_0\|shift_taps_s5h:auto_generated\|altsyncram_0uu:altsyncram2\|ram_block3a0~porta_datain_reg0 108.32 MHz 9.232 ns Internal " "Info: Clock \"clk\" has Internal fmax of 108.32 MHz between source register \"send_core:U_Core\|si_count\[3\]\" and destination memory \"shift_register:U_SR\|altshift_taps:shift_regs_rtl_0\|shift_taps_s5h:auto_generated\|altsyncram_0uu:altsyncram2\|ram_block3a0~porta_datain_reg0\" (period= 9.232 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "8.943 ns + Longest register memory " "Info: + Longest register to memory delay is 8.943 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns send_core:U_Core\|si_count\[3\] 1 REG LC_X15_Y11_N4 18 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X15_Y11_N4; Fanout = 18; REG Node = 'send_core:U_Core\|si_count\[3\]'" {  } { { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "" { send_core:U_Core|si_count[3] } "NODE_NAME" } "" } } { "send_core.vhd" "" { Text "E:/课题/预警/send/send_core.vhd" 46 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.348 ns) + CELL(0.590 ns) 1.938 ns send_core:U_Core\|Mux~626 2 COMB LC_X15_Y10_N2 1 " "Info: 2: + IC(1.348 ns) + CELL(0.590 ns) = 1.938 ns; Loc. = LC_X15_Y10_N2; Fanout = 1; COMB Node = 'send_core:U_Core\|Mux~626'" {  } { { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "1.938 ns" { send_core:U_Core|si_count[3] send_core:U_Core|Mux~626 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.434 ns) + CELL(0.590 ns) 2.962 ns send_core:U_Core\|Mux~627 3 COMB LC_X15_Y10_N3 1 " "Info: 3: + IC(0.434 ns) + CELL(0.590 ns) = 2.962 ns; Loc. = LC_X15_Y10_N3; Fanout = 1; COMB Node = 'send_core:U_Core\|Mux~627'" {  } { { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "1.024 ns" { send_core:U_Core|Mux~626 send_core:U_Core|Mux~627 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.182 ns) + CELL(0.114 ns) 3.258 ns send_core:U_Core\|Mux~628 4 COMB LC_X15_Y10_N4 1 " "Info: 4: + IC(0.182 ns) + CELL(0.114 ns) = 3.258 ns; Loc. = LC_X15_Y10_N4; Fanout = 1; COMB Node = 'send_core:U_Core\|Mux~628'" {  } { { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "0.296 ns" { send_core:U_Core|Mux~627 send_core:U_Core|Mux~628 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.512 ns) + CELL(0.442 ns) 5.212 ns send_core:U_Core\|Mux~631 5 COMB LC_X14_Y11_N5 1 " "Info: 5: + IC(1.512 ns) + CELL(0.442 ns) = 5.212 ns; Loc. = LC_X14_Y11_N5; Fanout = 1; COMB Node = 'send_core:U_Core\|Mux~631'" {  } { { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "1.954 ns" { send_core:U_Core|Mux~628 send_core:U_Core|Mux~631 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.405 ns) + CELL(0.442 ns) 6.059 ns send_core:U_Core\|Mux~642 6 COMB LC_X14_Y11_N8 1 " "Info: 6: + IC(0.405 ns) + CELL(0.442 ns) = 6.059 ns; Loc. = LC_X14_Y11_N8; Fanout = 1; COMB Node = 'send_core:U_Core\|Mux~642'" {  } { { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "0.847 ns" { send_core:U_Core|Mux~631 send_core:U_Core|Mux~642 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.408 ns) + CELL(0.442 ns) 6.909 ns send_core:U_Core\|Mux~653 7 COMB LC_X14_Y11_N3 1 " "Info: 7: + IC(0.408 ns) + CELL(0.442 ns) = 6.909 ns; Loc. = LC_X14_Y11_N3; Fanout = 1; COMB Node = 'send_core:U_Core\|Mux~653'" {  } { { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "0.850 ns" { send_core:U_Core|Mux~642 send_core:U_Core|Mux~653 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.182 ns) + CELL(0.114 ns) 7.205 ns send_core:U_Core\|send_si~56 8 COMB LC_X14_Y11_N4 1 " "Info: 8: + IC(0.182 ns) + CELL(0.114 ns) = 7.205 ns; Loc. = LC_X14_Y11_N4; Fanout = 1; COMB Node = 'send_core:U_Core\|send_si~56'" {  } { { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "0.296 ns" { send_core:U_Core|Mux~653 send_core:U_Core|send_si~56 } "NODE_NAME" } "" } } { "send_core.vhd" "" { Text "E:/课题/预警/send/send_core.vhd" 25 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.382 ns) + CELL(0.356 ns) 8.943 ns shift_register:U_SR\|altshift_taps:shift_regs_rtl_0\|shift_taps_s5h:auto_generated\|altsyncram_0uu:altsyncram2\|ram_block3a0~porta_datain_reg0 9 MEM M4K_X17_Y11 1 " "Info: 9: + IC(1.382 ns) + CELL(0.356 ns) = 8.943 ns; Loc. = M4K_X17_Y11; Fanout = 1; MEM Node = 'shift_register:U_SR\|altshift_taps:shift_regs_rtl_0\|shift_taps_s5h:auto_generated\|altsyncram_0uu:altsyncram2\|ram_block3a0~porta_datain_reg0'" {  } { { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "1.738 ns" { send_core:U_Core|send_si~56 shift_register:U_SR|altshift_taps:shift_regs_rtl_0|shift_taps_s5h:auto_generated|altsyncram_0uu:altsyncram2|ram_block3a0~porta_datain_reg0 } "NODE_NAME" } "" } } { "db/altsyncram_0uu.tdf" "" { Text "E:/课题/预警/send/db/altsyncram_0uu.tdf" 45 2 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.090 ns 34.55 % " "Info: Total cell delay = 3.090 ns ( 34.55 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "5.853 ns 65.45 % " "Info: Total interconnect delay = 5.853 ns ( 65.45 % )" {  } {  } 0}  } { { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "8.943 ns" { send_core:U_Core|si_count[3] send_core:U_Core|Mux~626 send_core:U_Core|Mux~627 send_core:U_Core|Mux~628 send_core:U_Core|Mux~631 send_core:U_Core|Mux~642 send_core:U_Core|Mux~653 send_core:U_Core|send_si~56 shift_register:U_SR|altshift_taps:shift_regs_rtl_0|shift_taps_s5h:auto_generated|altsyncram_0uu:altsyncram2|ram_block3a0~porta_datain_reg0 } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "8.943 ns" { send_core:U_Core|si_count[3] send_core:U_Core|Mux~626 send_core:U_Core|Mux~627 send_core:U_Core|Mux~628 send_core:U_Core|Mux~631 send_core:U_Core|Mux~642 send_core:U_Core|Mux~653 send_core:U_Core|send_si~56 shift_register:U_SR|altshift_taps:shift_regs_rtl_0|shift_taps_s5h:auto_generated|altsyncram_0uu:altsyncram2|ram_block3a0~porta_datain_reg0 } { 0.000ns 1.348ns 0.434ns 0.182ns 1.512ns 0.405ns 0.408ns 0.182ns 1.382ns } { 0.000ns 0.590ns 0.590ns 0.114ns 0.442ns 0.442ns 0.442ns 0.114ns 0.356ns } } }  } 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.028 ns - Smallest " "Info: - Smallest clock skew is 0.028 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk destination 2.953 ns + Shortest memory " "Info: + Shortest clock path from clock \"clk\" to destination memory is 2.953 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns clk 1 CLK PIN_29 90 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_29; Fanout = 90; CLK Node = 'clk'" {  } { { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "" { clk } "NODE_NAME" } "" } } { "send_top.vhd" "" { Text "E:/课题/预警/send/send_top.vhd" 13 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.762 ns) + CELL(0.722 ns) 2.953 ns shift_register:U_SR\|altshift_taps:shift_regs_rtl_0\|shift_taps_s5h:auto_generated\|altsyncram_0uu:altsyncram2\|ram_block3a0~porta_datain_reg0 2 MEM M4K_X17_Y11 1 " "Info: 2: + IC(0.762 ns) + CELL(0.722 ns) = 2.953 ns; Loc. = M4K_X17_Y11; Fanout = 1; MEM Node = 'shift_register:U_SR\|altshift_taps:shift_regs_rtl_0\|shift_taps_s5h:auto_generated\|altsyncram_0uu:altsyncram2\|ram_block3a0~porta_datain_reg0'" {  } { { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "1.484 ns" { clk shift_register:U_SR|altshift_taps:shift_regs_rtl_0|shift_taps_s5h:auto_generated|altsyncram_0uu:altsyncram2|ram_block3a0~porta_datain_reg0 } "NODE_NAME" } "" } } { "db/altsyncram_0uu.tdf" "" { Text "E:/课题/预警/send/db/altsyncram_0uu.tdf" 45 2 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.191 ns 74.20 % " "Info: Total cell delay = 2.191 ns ( 74.20 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.762 ns 25.80 % " "Info: Total interconnect delay = 0.762 ns ( 25.80 % )" {  } {  } 0}  } { { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "2.953 ns" { clk shift_register:U_SR|altshift_taps:shift_regs_rtl_0|shift_taps_s5h:auto_generated|altsyncram_0uu:altsyncram2|ram_block3a0~porta_datain_reg0 } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "2.953 ns" { clk clk~out0 shift_register:U_SR|altshift_taps:shift_regs_rtl_0|shift_taps_s5h:auto_generated|altsyncram_0uu:altsyncram2|ram_block3a0~porta_datain_reg0 } { 0.000ns 0.000ns 0.762ns } { 0.000ns 1.469ns 0.722ns } } }  } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk source 2.925 ns - Longest register " "Info: - Longest clock path from clock \"clk\" to source register is 2.925 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns clk 1 CLK PIN_29 90 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_29; Fanout = 90; CLK Node = 'clk'" {  } { { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "" { clk } "NODE_NAME" } "" } } { "send_top.vhd" "" { Text "E:/课题/预警/send/send_top.vhd" 13 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.745 ns) + CELL(0.711 ns) 2.925 ns send_core:U_Core\|si_count\[3\] 2 REG LC_X15_Y11_N4 18 " "Info: 2: + IC(0.745 ns) + CELL(0.711 ns) = 2.925 ns; Loc. = LC_X15_Y11_N4; Fanout = 18; REG Node = 'send_core:U_Core\|si_count\[3\]'" {  } { { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "1.456 ns" { clk send_core:U_Core|si_count[3] } "NODE_NAME" } "" } } { "send_core.vhd" "" { Text "E:/课题/预警/send/send_core.vhd" 46 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.180 ns 74.53 % " "Info: Total cell delay = 2.180 ns ( 74.53 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.745 ns 25.47 % " "Info: Total interconnect delay = 0.745 ns ( 25.47 % )" {  } {  } 0}  } { { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "2.925 ns" { clk send_core:U_Core|si_count[3] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "2.925 ns" { clk clk~out0 send_core:U_Core|si_count[3] } { 0.000ns 0.000ns 0.745ns } { 0.000ns 1.469ns 0.711ns } } }  } 0}  } { { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "2.953 ns" { clk shift_register:U_SR|altshift_taps:shift_regs_rtl_0|shift_taps_s5h:auto_generated|altsyncram_0uu:altsyncram2|ram_block3a0~porta_datain_reg0 } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "2.953 ns" { clk clk~out0 shift_register:U_SR|altshift_taps:shift_regs_rtl_0|shift_taps_s5h:auto_generated|altsyncram_0uu:altsyncram2|ram_block3a0~porta_datain_reg0 } { 0.000ns 0.000ns 0.762ns } { 0.000ns 1.469ns 0.722ns } } } { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "2.925 ns" { clk send_core:U_Core|si_count[3] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "2.925 ns" { clk clk~out0 send_core:U_Core|si_count[3] } { 0.000ns 0.000ns 0.745ns } { 0.000ns 1.469ns 0.711ns } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.224 ns + " "Info: + Micro clock to output delay of source is 0.224 ns" {  } { { "send_core.vhd" "" { Text "E:/课题/预警/send/send_core.vhd" 46 -1 0 } }  } 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.093 ns + " "Info: + Micro setup delay of destination is 0.093 ns" {  } { { "db/altsyncram_0uu.tdf" "" { Text "E:/课题/预警/send/db/altsyncram_0uu.tdf" 45 2 0 } }  } 0}  } { { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "8.943 ns" { send_core:U_Core|si_count[3] send_core:U_Core|Mux~626 send_core:U_Core|Mux~627 send_core:U_Core|Mux~628 send_core:U_Core|Mux~631 send_core:U_Core|Mux~642 send_core:U_Core|Mux~653 send_core:U_Core|send_si~56 shift_register:U_SR|altshift_taps:shift_regs_rtl_0|shift_taps_s5h:auto_generated|altsyncram_0uu:altsyncram2|ram_block3a0~porta_datain_reg0 } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "8.943 ns" { send_core:U_Core|si_count[3] send_core:U_Core|Mux~626 send_core:U_Core|Mux~627 send_core:U_Core|Mux~628 send_core:U_Core|Mux~631 send_core:U_Core|Mux~642 send_core:U_Core|Mux~653 send_core:U_Core|send_si~56 shift_register:U_SR|altshift_taps:shift_regs_rtl_0|shift_taps_s5h:auto_generated|altsyncram_0uu:altsyncram2|ram_block3a0~porta_datain_reg0 } { 0.000ns 1.348ns 0.434ns 0.182ns 1.512ns 0.405ns 0.408ns 0.182ns 1.382ns } { 0.000ns 0.590ns 0.590ns 0.114ns 0.442ns 0.442ns 0.442ns 0.114ns 0.356ns } } } { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "2.953 ns" { clk shift_register:U_SR|altshift_taps:shift_regs_rtl_0|shift_taps_s5h:auto_generated|altsyncram_0uu:altsyncram2|ram_block3a0~porta_datain_reg0 } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "2.953 ns" { clk clk~out0 shift_register:U_SR|altshift_taps:shift_regs_rtl_0|shift_taps_s5h:auto_generated|altsyncram_0uu:altsyncram2|ram_block3a0~porta_datain_reg0 } { 0.000ns 0.000ns 0.762ns } { 0.000ns 1.469ns 0.722ns } } } { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "2.925 ns" { clk send_core:U_Core|si_count[3] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "2.925 ns" { clk clk~out0 send_core:U_Core|si_count[3] } { 0.000ns 0.000ns 0.745ns } { 0.000ns 1.469ns 0.711ns } } }  } 0}
{ "Info" "ITDB_TSU_RESULT" "shift_register:U_SR\|altshift_taps:shift_regs_rtl_0\|shift_taps_s5h:auto_generated\|altsyncram_0uu:altsyncram2\|ram_block3a0~porta_datain_reg0 send_bus\[20\] clk 12.902 ns memory " "Info: tsu for memory \"shift_register:U_SR\|altshift_taps:shift_regs_rtl_0\|shift_taps_s5h:auto_generated\|altsyncram_0uu:altsyncram2\|ram_block3a0~porta_datain_reg0\" (data pin = \"send_bus\[20\]\", clock pin = \"clk\") is 12.902 ns" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "15.762 ns + Longest pin memory " "Info: + Longest pin to memory delay is 15.762 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.475 ns) 1.475 ns send_bus\[20\] 1 PIN PIN_203 2 " "Info: 1: + IC(0.000 ns) + CELL(1.475 ns) = 1.475 ns; Loc. = PIN_203; Fanout = 2; PIN Node = 'send_bus\[20\]'" {  } { { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "" { send_bus[20] } "NODE_NAME" } "" } } { "send_top.vhd" "" { Text "E:/课题/预警/send/send_top.vhd" 18 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(6.732 ns) + CELL(0.590 ns) 8.797 ns send_core:U_Core\|Mux~624 2 COMB LC_X15_Y10_N1 1 " "Info: 2: + IC(6.732 ns) + CELL(0.590 ns) = 8.797 ns; Loc. = LC_X15_Y10_N1; Fanout = 1; COMB Node = 'send_core:U_Core\|Mux~624'" {  } { { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "7.322 ns" { send_bus[20] send_core:U_Core|Mux~624 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.425 ns) + CELL(0.114 ns) 9.336 ns send_core:U_Core\|Mux~625 3 COMB LC_X15_Y10_N8 1 " "Info: 3: + IC(0.425 ns) + CELL(0.114 ns) = 9.336 ns; Loc. = LC_X15_Y10_N8; Fanout = 1; COMB Node = 'send_core:U_Core\|Mux~625'" {  } { { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "0.539 ns" { send_core:U_Core|Mux~624 send_core:U_Core|Mux~625 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.449 ns) + CELL(0.292 ns) 10.077 ns send_core:U_Core\|Mux~628 4 COMB LC_X15_Y10_N4 1 " "Info: 4: + IC(0.449 ns) + CELL(0.292 ns) = 10.077 ns; Loc. = LC_X15_Y10_N4; Fanout = 1; COMB Node = 'send_core:U_Core\|Mux~628'" {  } { { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "0.741 ns" { send_core:U_Core|Mux~625 send_core:U_Core|Mux~628 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.512 ns) + CELL(0.442 ns) 12.031 ns send_core:U_Core\|Mux~631 5 COMB LC_X14_Y11_N5 1 " "Info: 5: + IC(1.512 ns) + CELL(0.442 ns) = 12.031 ns; Loc. = LC_X14_Y11_N5; Fanout = 1; COMB Node = 'send_core:U_Core\|Mux~631'" {  } { { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "1.954 ns" { send_core:U_Core|Mux~628 send_core:U_Core|Mux~631 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.405 ns) + CELL(0.442 ns) 12.878 ns send_core:U_Core\|Mux~642 6 COMB LC_X14_Y11_N8 1 " "Info: 6: + IC(0.405 ns) + CELL(0.442 ns) = 12.878 ns; Loc. = LC_X14_Y11_N8; Fanout = 1; COMB Node = 'send_core:U_Core\|Mux~642'" {  } { { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "0.847 ns" { send_core:U_Core|Mux~631 send_core:U_Core|Mux~642 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.408 ns) + CELL(0.442 ns) 13.728 ns send_core:U_Core\|Mux~653 7 COMB LC_X14_Y11_N3 1 " "Info: 7: + IC(0.408 ns) + CELL(0.442 ns) = 13.728 ns; Loc. = LC_X14_Y11_N3; Fanout = 1; COMB Node = 'send_core:U_Core\|Mux~653'" {  } { { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "0.850 ns" { send_core:U_Core|Mux~642 send_core:U_Core|Mux~653 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.182 ns) + CELL(0.114 ns) 14.024 ns send_core:U_Core\|send_si~56 8 COMB LC_X14_Y11_N4 1 " "Info: 8: + IC(0.182 ns) + CELL(0.114 ns) = 14.024 ns; Loc. = LC_X14_Y11_N4; Fanout = 1; COMB Node = 'send_core:U_Core\|send_si~56'" {  } { { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "0.296 ns" { send_core:U_Core|Mux~653 send_core:U_Core|send_si~56 } "NODE_NAME" } "" } } { "send_core.vhd" "" { Text "E:/课题/预警/send/send_core.vhd" 25 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.382 ns) + CELL(0.356 ns) 15.762 ns shift_register:U_SR\|altshift_taps:shift_regs_rtl_0\|shift_taps_s5h:auto_generated\|altsyncram_0uu:altsyncram2\|ram_block3a0~porta_datain_reg0 9 MEM M4K_X17_Y11 1 " "Info: 9: + IC(1.382 ns) + CELL(0.356 ns) = 15.762 ns; Loc. = M4K_X17_Y11; Fanout = 1; MEM Node = 'shift_register:U_SR\|altshift_taps:shift_regs_rtl_0\|shift_taps_s5h:auto_generated\|altsyncram_0uu:altsyncram2\|ram_block3a0~porta_datain_reg0'" {  } { { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "1.738 ns" { send_core:U_Core|send_si~56 shift_register:U_SR|altshift_taps:shift_regs_rtl_0|shift_taps_s5h:auto_generated|altsyncram_0uu:altsyncram2|ram_block3a0~porta_datain_reg0 } "NODE_NAME" } "" } } { "db/altsyncram_0uu.tdf" "" { Text "E:/课题/预警/send/db/altsyncram_0uu.tdf" 45 2 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "4.267 ns 27.07 % " "Info: Total cell delay = 4.267 ns ( 27.07 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "11.495 ns 72.93 % " "Info: Total interconnect delay = 11.495 ns ( 72.93 % )" {  } {  } 0}  } { { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "15.762 ns" { send_bus[20] send_core:U_Core|Mux~624 send_core:U_Core|Mux~625 send_core:U_Core|Mux~628 send_core:U_Core|Mux~631 send_core:U_Core|Mux~642 send_core:U_Core|Mux~653 send_core:U_Core|send_si~56 shift_register:U_SR|altshift_taps:shift_regs_rtl_0|shift_taps_s5h:auto_generated|altsyncram_0uu:altsyncram2|ram_block3a0~porta_datain_reg0 } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "15.762 ns" { send_bus[20] send_bus[20]~out0 send_core:U_Core|Mux~624 send_core:U_Core|Mux~625 send_core:U_Core|Mux~628 send_core:U_Core|Mux~631 send_core:U_Core|Mux~642 send_core:U_Core|Mux~653 send_core:U_Core|send_si~56 shift_register:U_SR|altshift_taps:shift_regs_rtl_0|shift_taps_s5h:auto_generated|altsyncram_0uu:altsyncram2|ram_block3a0~porta_datain_reg0 } { 0.000ns 0.000ns 6.732ns 0.425ns 0.449ns 1.512ns 0.405ns 0.408ns 0.182ns 1.382ns } { 0.000ns 1.475ns 0.590ns 0.114ns 0.292ns 0.442ns 0.442ns 0.442ns 0.114ns 0.356ns } } }  } 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.093 ns + " "Info: + Micro setup delay of destination is 0.093 ns" {  } { { "db/altsyncram_0uu.tdf" "" { Text "E:/课题/预警/send/db/altsyncram_0uu.tdf" 45 2 0 } }  } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk destination 2.953 ns - Shortest memory " "Info: - Shortest clock path from clock \"clk\" to destination memory is 2.953 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns clk 1 CLK PIN_29 90 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_29; Fanout = 90; CLK Node = 'clk'" {  } { { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "" { clk } "NODE_NAME" } "" } } { "send_top.vhd" "" { Text "E:/课题/预警/send/send_top.vhd" 13 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.762 ns) + CELL(0.722 ns) 2.953 ns shift_register:U_SR\|altshift_taps:shift_regs_rtl_0\|shift_taps_s5h:auto_generated\|altsyncram_0uu:altsyncram2\|ram_block3a0~porta_datain_reg0 2 MEM M4K_X17_Y11 1 " "Info: 2: + IC(0.762 ns) + CELL(0.722 ns) = 2.953 ns; Loc. = M4K_X17_Y11; Fanout = 1; MEM Node = 'shift_register:U_SR\|altshift_taps:shift_regs_rtl_0\|shift_taps_s5h:auto_generated\|altsyncram_0uu:altsyncram2\|ram_block3a0~porta_datain_reg0'" {  } { { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "1.484 ns" { clk shift_register:U_SR|altshift_taps:shift_regs_rtl_0|shift_taps_s5h:auto_generated|altsyncram_0uu:altsyncram2|ram_block3a0~porta_datain_reg0 } "NODE_NAME" } "" } } { "db/altsyncram_0uu.tdf" "" { Text "E:/课题/预警/send/db/altsyncram_0uu.tdf" 45 2 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.191 ns 74.20 % " "Info: Total cell delay = 2.191 ns ( 74.20 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.762 ns 25.80 % " "Info: Total interconnect delay = 0.762 ns ( 25.80 % )" {  } {  } 0}  } { { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "2.953 ns" { clk shift_register:U_SR|altshift_taps:shift_regs_rtl_0|shift_taps_s5h:auto_generated|altsyncram_0uu:altsyncram2|ram_block3a0~porta_datain_reg0 } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "2.953 ns" { clk clk~out0 shift_register:U_SR|altshift_taps:shift_regs_rtl_0|shift_taps_s5h:auto_generated|altsyncram_0uu:altsyncram2|ram_block3a0~porta_datain_reg0 } { 0.000ns 0.000ns 0.762ns } { 0.000ns 1.469ns 0.722ns } } }  } 0}  } { { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "15.762 ns" { send_bus[20] send_core:U_Core|Mux~624 send_core:U_Core|Mux~625 send_core:U_Core|Mux~628 send_core:U_Core|Mux~631 send_core:U_Core|Mux~642 send_core:U_Core|Mux~653 send_core:U_Core|send_si~56 shift_register:U_SR|altshift_taps:shift_regs_rtl_0|shift_taps_s5h:auto_generated|altsyncram_0uu:altsyncram2|ram_block3a0~porta_datain_reg0 } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "15.762 ns" { send_bus[20] send_bus[20]~out0 send_core:U_Core|Mux~624 send_core:U_Core|Mux~625 send_core:U_Core|Mux~628 send_core:U_Core|Mux~631 send_core:U_Core|Mux~642 send_core:U_Core|Mux~653 send_core:U_Core|send_si~56 shift_register:U_SR|altshift_taps:shift_regs_rtl_0|shift_taps_s5h:auto_generated|altsyncram_0uu:altsyncram2|ram_block3a0~porta_datain_reg0 } { 0.000ns 0.000ns 6.732ns 0.425ns 0.449ns 1.512ns 0.405ns 0.408ns 0.182ns 1.382ns } { 0.000ns 1.475ns 0.590ns 0.114ns 0.292ns 0.442ns 0.442ns 0.442ns 0.114ns 0.356ns } } } { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "2.953 ns" { clk shift_register:U_SR|altshift_taps:shift_regs_rtl_0|shift_taps_s5h:auto_generated|altsyncram_0uu:altsyncram2|ram_block3a0~porta_datain_reg0 } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "2.953 ns" { clk clk~out0 shift_register:U_SR|altshift_taps:shift_regs_rtl_0|shift_taps_s5h:auto_generated|altsyncram_0uu:altsyncram2|ram_block3a0~porta_datain_reg0 } { 0.000ns 0.000ns 0.762ns } { 0.000ns 1.469ns 0.722ns } } }  } 0}
{ "Info" "ITDB_FULL_TCO_RESULT" "clk TxD send_core:U_Core\|sel_out 9.549 ns register " "Info: tco from clock \"clk\" to destination pin \"TxD\" through register \"send_core:U_Core\|sel_out\" is 9.549 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk source 2.954 ns + Longest register " "Info: + Longest clock path from clock \"clk\" to source register is 2.954 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns clk 1 CLK PIN_29 90 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_29; Fanout = 90; CLK Node = 'clk'" {  } { { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "" { clk } "NODE_NAME" } "" } } { "send_top.vhd" "" { Text "E:/课题/预警/send/send_top.vhd" 13 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.774 ns) + CELL(0.711 ns) 2.954 ns send_core:U_Core\|sel_out 2 REG LC_X11_Y13_N5 2 " "Info: 2: + IC(0.774 ns) + CELL(0.711 ns) = 2.954 ns; Loc. = LC_X11_Y13_N5; Fanout = 2; REG Node = 'send_core:U_Core\|sel_out'" {  } { { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "1.485 ns" { clk send_core:U_Core|sel_out } "NODE_NAME" } "" } } { "send_core.vhd" "" { Text "E:/课题/预警/send/send_core.vhd" 30 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.180 ns 73.80 % " "Info: Total cell delay = 2.180 ns ( 73.80 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.774 ns 26.20 % " "Info: Total interconnect delay = 0.774 ns ( 26.20 % )" {  } {  } 0}  } { { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "2.954 ns" { clk send_core:U_Core|sel_out } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "2.954 ns" { clk clk~out0 send_core:U_Core|sel_out } { 0.000ns 0.000ns 0.774ns } { 0.000ns 1.469ns 0.711ns } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.224 ns + " "Info: + Micro clock to output delay of source is 0.224 ns" {  } { { "send_core.vhd" "" { Text "E:/课题/预警/send/send_core.vhd" 30 -1 0 } }  } 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "6.371 ns + Longest register pin " "Info: + Longest register to pin delay is 6.371 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns send_core:U_Core\|sel_out 1 REG LC_X11_Y13_N5 2 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X11_Y13_N5; Fanout = 2; REG Node = 'send_core:U_Core\|sel_out'" {  } { { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "" { send_core:U_Core|sel_out } "NODE_NAME" } "" } } { "send_core.vhd" "" { Text "E:/课题/预警/send/send_core.vhd" 30 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.255 ns) + CELL(0.442 ns) 1.697 ns switch:U_TXDSwitch\|dout~2 2 COMB LC_X11_Y12_N2 1 " "Info: 2: + IC(1.255 ns) + CELL(0.442 ns) = 1.697 ns; Loc. = LC_X11_Y12_N2; Fanout = 1; COMB Node = 'switch:U_TXDSwitch\|dout~2'" {  } { { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "1.697 ns" { send_core:U_Core|sel_out switch:U_TXDSwitch|dout~2 } "NODE_NAME" } "" } } { "switch.vhd" "" { Text "E:/课题/预警/send/switch.vhd" 10 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.566 ns) + CELL(2.108 ns) 6.371 ns TxD 3 PIN PIN_223 0 " "Info: 3: + IC(2.566 ns) + CELL(2.108 ns) = 6.371 ns; Loc. = PIN_223; Fanout = 0; PIN Node = 'TxD'" {  } { { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "4.674 ns" { switch:U_TXDSwitch|dout~2 TxD } "NODE_NAME" } "" } } { "send_top.vhd" "" { Text "E:/课题/预警/send/send_top.vhd" 22 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.550 ns 40.03 % " "Info: Total cell delay = 2.550 ns ( 40.03 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "3.821 ns 59.97 % " "Info: Total interconnect delay = 3.821 ns ( 59.97 % )" {  } {  } 0}  } { { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "6.371 ns" { send_core:U_Core|sel_out switch:U_TXDSwitch|dout~2 TxD } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "6.371 ns" { send_core:U_Core|sel_out switch:U_TXDSwitch|dout~2 TxD } { 0.000ns 1.255ns 2.566ns } { 0.000ns 0.442ns 2.108ns } } }  } 0}  } { { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "2.954 ns" { clk send_core:U_Core|sel_out } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "2.954 ns" { clk clk~out0 send_core:U_Core|sel_out } { 0.000ns 0.000ns 0.774ns } { 0.000ns 1.469ns 0.711ns } } } { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "6.371 ns" { send_core:U_Core|sel_out switch:U_TXDSwitch|dout~2 TxD } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "6.371 ns" { send_core:U_Core|sel_out switch:U_TXDSwitch|dout~2 TxD } { 0.000ns 1.255ns 2.566ns } { 0.000ns 0.442ns 2.108ns } } }  } 0}
{ "Info" "ITDB_FULL_TPD_RESULT" "clk rdclk 5.199 ns Longest " "Info: Longest tpd from source pin \"clk\" to destination pin \"rdclk\" is 5.199 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns clk 1 CLK PIN_29 90 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_29; Fanout = 90; CLK Node = 'clk'" {  } { { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "" { clk } "NODE_NAME" } "" } } { "send_top.vhd" "" { Text "E:/课题/预警/send/send_top.vhd" 13 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.606 ns) + CELL(2.124 ns) 5.199 ns rdclk 2 PIN PIN_123 0 " "Info: 2: + IC(1.606 ns) + CELL(2.124 ns) = 5.199 ns; Loc. = PIN_123; Fanout = 0; PIN Node = 'rdclk'" {  } { { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "3.730 ns" { clk rdclk } "NODE_NAME" } "" } } { "send_top.vhd" "" { Text "E:/课题/预警/send/send_top.vhd" 14 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.593 ns 69.11 % " "Info: Total cell delay = 3.593 ns ( 69.11 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.606 ns 30.89 % " "Info: Total interconnect delay = 1.606 ns ( 30.89 % )" {  } {  } 0}  } { { "E:/课题/预警/send/db/send_cmp.qrpt" "" { Report "E:/课题/预警/send/db/send_cmp.qrpt" Compiler "send" "UNKNOWN" "V1" "E:/课题/预警/send/db/send.quartus_db" { Floorplan "E:/课题/预警/send/" "" "5.199 ns" { clk rdclk } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "5.199 ns" { clk clk~out0 rdclk } { 0.000ns 0.000ns 1.606ns } { 0.000ns 1.469ns 2.124ns } } }  } 0}