fspi.hier_info

很多仪器都输出同步时钟

clk_en => countera5.ENA
clk_en => countera6.ENA
clk_en => countera7.ENA
clk_en => parity.ENA
clock => countera0.CLK
clock => countera1.CLK
clock => countera2.CLK
clock => countera3.CLK
clock => countera4.CLK
clock => countera5.CLK
clock => countera6.CLK
clock => countera7.CLK
clock => parity.CLK
q[0] <= countera0.REGOUT
q[1] <= countera1.REGOUT
q[2] <= countera2.REGOUT
q[3] <= countera3.REGOUT
q[4] <= countera4.REGOUT
q[5] <= countera5.REGOUT
q[6] <= countera6.REGOUT
q[7] <= countera7.REGOUT


|spi|fifo0:inst1|dcfifo:dcfifo_component|dcfifo_miu:auto_generated|a_graycounter_i06:wrptr_g
aclr => countera0.ACLR
aclr => countera1.ACLR
aclr => countera2.ACLR
aclr => countera3.ACLR
aclr => countera4.ACLR
aclr => countera5.ACLR
aclr => countera6.ACLR
aclr => countera7.ACLR
aclr => parity.ACLR
clk_en => countera0.ENA
clk_en => countera1.ENA
clk_en => countera2.ENA
clk_en => countera3.ENA
clk_en => countera4.ENA
clk_en => countera5.ENA
clk_en => countera6.ENA
clk_en => countera7.ENA
clk_en => parity.ENA
clock => countera0.CLK
clock => countera1.CLK
clock => countera2.CLK
clock => countera3.CLK
clock => countera4.CLK
clock => countera5.CLK
clock => countera6.CLK
clock => countera7.CLK
clock => parity.CLK
q[0] <= countera0.REGOUT
q[1] <= countera1.REGOUT
q[2] <= countera2.REGOUT
q[3] <= countera3.REGOUT
q[4] <= countera4.REGOUT
q[5] <= countera5.REGOUT
q[6] <= countera6.REGOUT
q[7] <= countera7.REGOUT


|spi|fifo0:inst1|dcfifo:dcfifo_component|dcfifo_miu:auto_generated|altsyncram_p3v:fifo_ram
address_a[0] => ram_block9a0.PORTAADDR
address_a[0] => ram_block9a1.PORTAADDR
address_a[0] => ram_block9a2.PORTAADDR
address_a[0] => ram_block9a3.PORTAADDR
address_a[0] => ram_block9a4.PORTAADDR
address_a[0] => ram_block9a5.PORTAADDR
address_a[0] => ram_block9a6.PORTAADDR
address_a[0] => ram_block9a7.PORTAADDR
address_a[0] => ram_block9a8.PORTAADDR
address_a[0] => ram_block9a9.PORTAADDR
address_a[0] => ram_block9a10.PORTAADDR
address_a[0] => ram_block9a11.PORTAADDR
address_a[0] => ram_block9a12.PORTAADDR
address_a[0] => ram_block9a13.PORTAADDR
address_a[0] => ram_block9a14.PORTAADDR
address_a[0] => ram_block9a15.PORTAADDR
address_a[0] => ram_block9a16.PORTAADDR
address_a[0] => ram_block9a17.PORTAADDR
address_a[0] => ram_block9a18.PORTAADDR
address_a[0] => ram_block9a19.PORTAADDR
address_a[0] => ram_block9a20.PORTAADDR
address_a[0] => ram_block9a21.PORTAADDR
address_a[0] => ram_block9a22.PORTAADDR
address_a[0] => ram_block9a23.PORTAADDR
address_a[0] => ram_block9a24.PORTAADDR
address_a[0] => ram_block9a25.PORTAADDR
address_a[0] => ram_block9a26.PORTAADDR
address_a[0] => ram_block9a27.PORTAADDR
address_a[0] => ram_block9a28.PORTAADDR
address_a[0] => ram_block9a29.PORTAADDR
address_a[0] => ram_block9a30.PORTAADDR
address_a[0] => ram_block9a31.PORTAADDR
address_a[0] => ram_block9a32.PORTAADDR
address_a[0] => ram_block9a33.PORTAADDR
address_a[0] => ram_block9a34.PORTAADDR
address_a[0] => ram_block9a35.PORTAADDR
address_a[0] => ram_block9a36.PORTAADDR
address_a[0] => ram_block9a37.PORTAADDR
address_a[0] => ram_block9a38.PORTAADDR
address_a[0] => ram_block9a39.PORTAADDR
address_a[0] => ram_block9a40.PORTAADDR
address_a[0] => ram_block9a41.PORTAADDR
address_a[0] => ram_block9a42.PORTAADDR
address_a[0] => ram_block9a43.PORTAADDR
address_a[0] => ram_block9a44.PORTAADDR
address_a[0] => ram_block9a45.PORTAADDR
address_a[0] => ram_block9a46.PORTAADDR
address_a[0] => ram_block9a47.PORTAADDR
address_a[0] => ram_block9a48.PORTAADDR
address_a[0] => ram_block9a49.PORTAADDR
address_a[0] => ram_block9a50.PORTAADDR
address_a[0] => ram_block9a51.PORTAADDR
address_a[0] => ram_block9a52.PORTAADDR
address_a[0] => ram_block9a53.PORTAADDR
address_a[0] => ram_block9a54.PORTAADDR
address_a[0] => ram_block9a55.PORTAADDR
address_a[0] => ram_block9a56.PORTAADDR
address_a[0] => ram_block9a57.PORTAADDR
address_a[0] => ram_block9a58.PORTAADDR
address_a[0] => ram_block9a59.PORTAADDR
address_a[0] => ram_block9a60.PORTAADDR
address_a[0] => ram_block9a61.PORTAADDR
address_a[0] => ram_block9a62.PORTAADDR
address_a[0] => ram_block9a63.PORTAADDR
address_a[1] => ram_block9a0.PORTAADDR1
address_a[1] => ram_block9a1.PORTAADDR1
address_a[1] => ram_block9a2.PORTAADDR1
address_a[1] => ram_block9a3.PORTAADDR1
address_a[1] => ram_block9a4.PORTAADDR1
address_a[1] => ram_block9a5.PORTAADDR1
address_a[1] => ram_block9a6.PORTAADDR1
address_a[1] => ram_block9a7.PORTAADDR1
address_a[1] => ram_block9a8.PORTAADDR1
address_a[1] => ram_block9a9.PORTAADDR1
address_a[1] => ram_block9a10.PORTAADDR1
address_a[1] => ram_block9a11.PORTAADDR1
address_a[1] => ram_block9a12.PORTAADDR1
address_a[1] => ram_block9a13.PORTAADDR1
address_a[1] => ram_block9a14.PORTAADDR1
address_a[1] => ram_block9a15.PORTAADDR1
address_a[1] => ram_block9a16.PORTAADDR1
address_a[1] => ram_block9a17.PORTAADDR1
address_a[1] => ram_block9a18.PORTAADDR1
address_a[1] => ram_block9a19.PORTAADDR1
address_a[1] => ram_block9a20.PORTAADDR1
address_a[1] => ram_block9a21.PORTAADDR1
address_a[1] => ram_block9a22.PORTAADDR1
address_a[1] => ram_block9a23.PORTAADDR1
address_a[1] => ram_block9a24.PORTAADDR1
address_a[1] => ram_block9a25.PORTAADDR1
address_a[1] => ram_block9a26.PORTAADDR1
address_a[1] => ram_block9a27.PORTAADDR1
address_a[1] => ram_block9a28.PORTAADDR1
address_a[1] => ram_block9a29.PORTAADDR1
address_a[1] => ram_block9a30.PORTAADDR1
address_a[1] => ram_block9a31.PORTAADDR1
address_a[1] => ram_block9a32.PORTAADDR1
address_a[1] => ram_block9a33.PORTAADDR1
address_a[1] => ram_block9a34.PORTAADDR1
address_a[1] => ram_block9a35.PORTAADDR1
address_a[1] => ram_block9a36.PORTAADDR1
address_a[1] => ram_block9a37.PORTAADDR1
address_a[1] => ram_block9a38.PORTAADDR1
address_a[1] => ram_block9a39.PORTAADDR1
address_a[1] => ram_block9a40.PORTAADDR1
address_a[1] => ram_block9a41.PORTAADDR1
address_a[1] => ram_block9a42.PORTAADDR1
address_a[1] => ram_block9a43.PORTAADDR1
address_a[1] => ram_block9a44.PORTAADDR1
address_a[1] => ram_block9a45.PORTAADDR1
address_a[1] => ram_block9a46.PORTAADDR1
address_a[1] => ram_block9a47.PORTAADDR1
address_a[1] => ram_block9a48.PORTAADDR1
address_a[1] => ram_block9a49.PORTAADDR1
address_a[1] => ram_block9a50.PORTAADDR1
address_a[1] => ram_block9a51.PORTAADDR1
address_a[1] => ram_block9a52.PORTAADDR1
address_a[1] => ram_block9a53.PORTAADDR1
address_a[1] => ram_block9a54.PORTAADDR1
address_a[1] => ram_block9a55.PORTAADDR1
address_a[1] => ram_block9a56.PORTAADDR1
address_a[1] => ram_block9a57.PORTAADDR1
address_a[1] => ram_block9a58.PORTAADDR1
address_a[1] => ram_block9a59.PORTAADDR1
address_a[1] => ram_block9a60.PORTAADDR1
address_a[1] => ram_block9a61.PORTAADDR1
address_a[1] => ram_block9a62.PORTAADDR1
address_a[1] => ram_block9a63.PORTAADDR1
address_a[2] => ram_block9a0.PORTAADDR2
address_a[2] => ram_block9a1.PORTAADDR2
address_a[2] => ram_block9a2.PORTAADDR2
address_a[2] => ram_block9a3.PORTAADDR2
address_a[2] => ram_block9a4.PORTAADDR2
address_a[2] => ram_block9a5.PORTAADDR2
address_a[2] => ram_block9a6.PORTAADDR2
address_a[2] => ram_block9a7.PORTAADDR2
address_a[2] => ram_block9a8.PORTAADDR2
address_a[2] => ram_block9a9.PORTAADDR2
address_a[2] => ram_block9a10.PORTAADDR2
address_a[2] => ram_block9a11.PORTAADDR2
address_a[2] => ram_block9a12.PORTAADDR2
address_a[2] => ram_block9a13.PORTAADDR2
address_a[2] => ram_block9a14.PORTAADDR2
address_a[2] => ram_block9a15.PORTAADDR2
address_a[2] => ram_block9a16.PORTAADDR2
address_a[2] => ram_block9a17.PORTAADDR2
address_a[2] => ram_block9a18.PORTAADDR2
address_a[2] => ram_block9a19.PORTAADDR2
address_a[2] => ram_block9a20.PORTAADDR2
address_a[2] => ram_block9a21.PORTAADDR2
address_a[2] => ram_block9a22.PORTAADDR2
address_a[2] => ram_block9a23.PORTAADDR2
address_a[2] => ram_block9a24.PORTAADDR2
address_a[2] => ram_block9a25.PORTAADDR2
address_a[2] => ram_block9a26.PORTAADDR2
address_a[2] => ram_block9a27.PORTAADDR2
address_a[2] => ram_block9a28.PORTAADDR2
address_a[2] => ram_block9a29.PORTAADDR2
address_a[2] => ram_block9a30.PORTAADDR2
address_a[2] => ram_block9a31.PORTAADDR2
address_a[2] => ram_block9a32.PORTAADDR2
address_a[2] => ram_block9a33.PORTAADDR2
address_a[2] => ram_block9a34.PORTAADDR2
address_a[2] => ram_block9a35.PORTAADDR2
address_a[2] => ram_block9a36.PORTAADDR2
address_a[2] => ram_block9a37.PORTAADDR2
address_a[2] => ram_block9a38.PORTAADDR2
address_a[2] => ram_block9a39.PORTAADDR2
address_a[2] => ram_block9a40.PORTAADDR2
address_a[2] => ram_block9a41.PORTAADDR2
address_a[2] => ram_block9a42.PORTAADDR2
address_a[2] => ram_block9a43.PORTAADDR2
address_a[2] => ram_block9a44.PORTAADDR2
address_a[2] => ram_block9a45.PORTAADDR2
address_a[2] => ram_block9a46.PORTAADDR2
address_a[2] => ram_block9a47.PORTAADDR2
address_a[2] => ram_block9a48.PORTAADDR2
address_a[2] => ram_block9a49.PORTAADDR2
address_a[2] => ram_block9a50.PORTAADDR2
address_a[2] => ram_block9a51.PORTAADDR2
address_a[2] => ram_block9a52.PORTAADDR2
address_a[2] => ram_block9a53.PORTAADDR2
address_a[2] => ram_block9a54.PORTAADDR2
address_a[2] => ram_block9a55.PORTAADDR2
address_a[2] => ram_block9a56.PORTAADDR2
address_a[2] => ram_block9a57.PORTAADDR2
address_a[2] => ram_block9a58.PORTAADDR2
address_a[2] => ram_block9a59.PORTAADDR2
address_a[2] => ram_block9a60.PORTAADDR2
address_a[2] => ram_block9a61.PORTAADDR2
address_a[2] => ram_block9a62.PORTAADDR2
address_a[2] => ram_block9a63.PORTAADDR2
address_a[3] => ram_block9a0.PORTAADDR3
address_a[3] => ram_block9a1.PORTAADDR3
address_a[3] => ram_block9a2.PORTAADDR3
address_a[3] => ram_block9a3.PORTAADDR3
address_a[3] => ram_block9a4.PORTAADDR3
address_a[3] => ram_block9a5.PORTAADDR3
address_a[3] => ram_block9a6.PORTAADDR3
address_a[3] => ram_block9a7.PORTAADDR3
address_a[3] => ram_block9a8.PORTAADDR3
address_a[3] => ram_block9a9.PORTAADDR3
address_a[3] => ram_block9a10.PORTAADDR3
address_a[3] => ram_block9a11.PORTAADDR3
address_a[3] => ram_block9a12.PORTAADDR3
address_a[3] => ram_block9a13.PORTAADDR3
address_a[3] => ram_block9a14.PORTAADDR3
address_a[3] => ram_block9a15.PORTAADDR3
address_a[3] => ram_block9a16.PORTAADDR3
address_a[3] => ram_block9a17.PORTAADDR3
address_a[3] => ram_block9a18.PORTAADDR3
address_a[3] => ram_block9a19.PORTAADDR3
address_a[3] => ram_block9a20.PORTAADDR3
address_a[3] => ram_block9a21.PORTAADDR3
address_a[3] => ram_block9a22.PORTAADDR3
address_a[3] => ram_block9a23.PORTAADDR3
address_a[3] => ram_block9a24.PORTAADDR3
address_a[3] => ram_block9a25.PORTAADDR3
address_a[3] => ram_block9a26.PORTAADDR3
address_a[3] => ram_block9a27.PORTAADDR3
address_a[3] => ram_block9a28.PORTAADDR3
address_a[3] => ram_block9a29.PORTAADDR3
address_a[3] => ram_block9a30.PORTAADDR3
address_a[3] => ram_block9a31.PORTAADDR3
address_a[3] => ram_block9a32.PORTAADDR3
address_a[3] => ram_block9a33.PORTAADDR3
address_a[3] => ram_block9a34.PORTAADDR3
address_a[3] => ram_block9a35.PORTAADDR3
address_a[3] => ram_block9a36.PORTAADDR3
address_a[3] => ram_block9a37.PORTAADDR3
address_a[3] => ram_block9a38.PORTAADDR3
address_a[3] => ram_block9a39.PORTAADDR3
address_a[3] => ram_block9a40.PORTAADDR3
address_a[3] => ram_block9a41.PORTAADDR3
address_a[3] => ram_block9a42.PORTAADDR3
address_a[3] => ram_block9a43.PORTAADDR3
address_a[3] => ram_block9a44.PORTAADDR3
address_a[3] => ram_block9a45.PORTAADDR3
address_a[3] => ram_block9a46.PORTAADDR3
address_a[3] => ram_block9a47.PORTAADDR3
address_a[3] => ram_block9a48.PORTAADDR3
address_a[3] => ram_block9a49.PORTAADDR3
address_a[3] => ram_block9a50.PORTAADDR3
address_a[3] => ram_block9a51.PORTAADDR3
address_a[3] => ram_block9a52.PORTAADDR3
address_a[3] => ram_block9a53.PORTAADDR3
address_a[3] => ram_block9a54.PORTAADDR3
address_a[3] => ram_block9a55.PORTAADDR3
address_a[3] => ram_block9a56.PORTAADDR3
address_a[3] => ram_block9a57.PORTAADDR3
address_a[3] => ram_block9a58.PORTAADDR3
address_a[3] => ram_block9a59.PORTAADDR3
address_a[3] => ram_block9a60.PORTAADDR3
address_a[3] => ram_block9a61.PORTAADDR3
address_a[3] => ram_block9a62.PORTAADDR3
address_a[3] => ram_block9a63.PORTAADDR3
address_a[4] => ram_block9a0.PORTAADDR4
address_a[4] => ram_block9a1.PORTAADDR4
address_a[4] => ram_block9a2.PORTAADDR4
address_a[4] => ram_block9a3.PORTAADDR4
address_a[4] => ram_block9a4.PORTAADDR4
address_a[4] => ram_block9a5.PORTAADDR4
address_a[4] => ram_block9a6.PORTAADDR4
address_a[4] => ram_block9a7.PORTAADDR4
address_a[4] => ram_block9a8.PORTAADDR4
address_a[4] => ram_block9a9.PORTAADDR4
address_a[4] => ram_block9a10.PORTAADDR4
address_a[4] => ram_block9a11.PORTAADDR4
address_a[4] => ram_block9a12.PORTAADDR4
address_a[4] => ram_block9a13.PORTAADDR4
address_a[4] => ram_block9a14.PORTAADDR4
address_a[4] => ram_block9a15.PORTAADDR4
address_a[4] => ram_block9a16.PORTAADDR4
address_a[4] => ram_block9a17.PORTAADDR4
address_a[4] => ram_block9a18.PORTAADDR4
address_a[4] => ram_block9a19.PORTAADDR4
address_a[4] => ram_block9a20.PORTAADDR4
address_a[4] => ram_block9a21.PORTAADDR4
address_a[4] => ram_block9a22.PORTAADDR4
address_a[4] => ram_block9a23.PORTAADDR4
address_a[4] => ram_block9a24.PORTAADDR4
address_a[4] => ram_block9a25.PORTAADDR4
address_a[4] => ram_block9a26.PORTAADDR4
address_a[4] => ram_block9a27.PORTAADDR4
address_a[4] => ram_block9a28.PORTAADDR4
address_a[4] => ram_block9a29.PORTAADDR4
address_a[4] => ram_block9a30.PORTAADDR4
address_a[4] => ram_block9a31.PORTAADDR4
address_a[4] => ram_block9a32.PORTAADDR4
address_a[4] => ram_block9a33.PORTAADDR4
address_a[4] => ram_block9a34.PORTAADDR4
address_a[4] => ram_block9a35.PORTAADDR4
address_a[4] => ram_block9a36.PORTAADDR4
address_a[4] => ram_block9a37.PORTAADDR4
address_a[4] => ram_block9a38.PORTAADDR4
address_a[4] => ram_block9a39.PORTAADDR4
address_a[4] => ram_block9a40.PORTAADDR4
address_a[4] => ram_block9a41.POR