dalitest.vhd

很多仪器都输出同步时钟

library ieee;
use ieee.std_logic_1164.all;
use ieee. std_logic_unsigned.all;
entity DALITEST is
PORT(fin:in std_logic_vector(63 downto 0);
     dalidata:out std_logic_vector(7 downto 0);
     dalival:inout std_logic;
     valin:in std_logic;
     enable:inout std_logic;
     frempty:in std_logic);
end DALITEST;
architecture rtl of DALITEST is
signal temp:std_logic_vector(63 downto 0);
signal count:std_logic_vector(3 downto 0);

begin
process(dalival)
begin
if(frempty='0') then
   temp<=fin;  
   enable<='1';
else if(enable='1')then
      dalival<=valin;
     if(count=7)then
       enable<='0';
     end if;
     if(dalival'event and dalival='1') 
      then count<=count+'1';
           case count is
               when "0000"=>dalidata<=temp(63 downto 56);
               when "0001"=>dalidata<=temp(55 downto 48);
               when "0010"=>dalidata<=temp(47 downto 40);
               when "0011"=>dalidata<=temp(39 downto 32);
               when "0100"=>dalidata<=temp(31 downto 24);
               when "0101"=>dalidata<=temp(23 downto 16);
               when "0110"=>dalidata<=temp(15 downto 8);
               when "0111"=>dalidata<=temp(7 downto 0);
               when others=>dalidata<=(others=>'0');
           end case;
      end if; 
    elsif(enable='0')then 
        count<="0000";
        dalival<='0';
        end if;
end if;

end process;
end rtl;