📄 fspi.tan.summary
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Timing Analyzer Summary
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Type : Worst-case tsu
Slack : N/A
Required Time : None
Actual Time : 9.568 ns
From : spiclk
To : fspi:inst|enable~reg0
From Clock :
To Clock : clk
Failed Paths : 0
Type : Worst-case tco
Slack : N/A
Required Time : None
Actual Time : 39.226 ns
From : fspi:inst|dout[27]
To : spisomi
From Clock : spiclk
To Clock :
Failed Paths : 0
Type : Worst-case tpd
Slack : N/A
Required Time : None
Actual Time : 12.961 ns
From : rx485_in1
To : rx485_out3
From Clock :
To Clock :
Failed Paths : 0
Type : Worst-case th
Slack : N/A
Required Time : None
Actual Time : 5.024 ns
From : altera_internal_jtag
To : sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR[3]
From Clock :
To Clock : altera_internal_jtag~TCKUTAP
Failed Paths : 0
Type : Clock Setup: 'clk'
Slack : 13.506 ns
Required Time : 50.00 MHz ( period = 20.000 ns )
Actual Time : 153.99 MHz ( period = 6.494 ns )
From : sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_419:auto_generated|safe_q[1]
To : sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_segment_mgr:\gen_non_zero_sample_depth_segment:seg_mgr|lpm_counter:\non_zero_sample_depth_gen:segment_addr_counter|cntr_419:auto_generated|safe_q[1]
From Clock : clk
To Clock : clk
Failed Paths : 0
Type : Clock Setup: 'pll0:inst12|altpll:altpll_component|_clk1'
Slack : 30.816 ns
Required Time : 25.00 MHz ( period = 40.000 ns )
Actual Time : 108.89 MHz ( period = 9.184 ns )
From : lpm_counter2:inst18|lpm_counter:lpm_counter_component|cntr_5k8:auto_generated|safe_q[17]
To : lpm_counter2:inst18|lpm_counter:lpm_counter_component|cntr_5k8:auto_generated|safe_q[0]
From Clock : pll0:inst12|altpll:altpll_component|_clk1
To Clock : pll0:inst12|altpll:altpll_component|_clk1
Failed Paths : 0
Type : Clock Setup: 'pll0:inst12|altpll:altpll_component|_clk0'
Slack : 44.724 ns
Required Time : 20.00 MHz ( period = 50.000 ns )
Actual Time : 189.54 MHz ( period = 5.276 ns )
From : fspi:inst|clkcount[3]~reg0
To : fspi:inst|enable~reg0
From Clock : pll0:inst12|altpll:altpll_component|_clk0
To Clock : pll0:inst12|altpll:altpll_component|_clk0
Failed Paths : 0
Type : Clock Setup: 'altera_internal_jtag~TCKUTAP'
Slack : N/A
Required Time : None
Actual Time : 101.58 MHz ( period = 9.844 ns )
From : sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[5]
To : sld_hub:sld_hub_inst|hub_tdo
From Clock : altera_internal_jtag~TCKUTAP
To Clock : altera_internal_jtag~TCKUTAP
Failed Paths : 0
Type : Clock Setup: 'spiclk'
Slack : N/A
Required Time : None
Actual Time : 108.52 MHz ( period = 9.215 ns )
From : fifo0:inst1|dcfifo:dcfifo_component|dcfifo_miu:auto_generated|scfifo:output_channel|a_fffifo:subfifo|lpm_ff:output_buffer|dffs[19]
To : fspi:inst|dout[82]
From Clock : spiclk
To Clock : spiclk
Failed Paths : 0
Type : Clock Setup: 'syn_in'
Slack : N/A
Required Time : None
Actual Time : 154.30 MHz ( period = 6.481 ns )
From : counter8:inst6|lpm_counter:lpm_counter_component|cntr_gs6:auto_generated|safe_q[4]
To : tx_data:inst7|data[4]
From Clock : syn_in
To Clock : syn_in
Failed Paths : 0
Type : Clock Hold: 'clk'
Slack : 0.873 ns
Required Time : 50.00 MHz ( period = 20.000 ns )
Actual Time : N/A
From : sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|sld_ela_basic_multi_level_trigger:\basic_multi_level_mbpm_trigger_gen:multi_level_mbpm|sld_mbpmg:\trigger_modules_gen:0:trigger_match|sld_sbpmg:\gen_sbpmg_pipeline_less_than_two:sm0:0:sm1|holdff
To : sld_signaltap:auto_signaltap_0|acq_data_in_pipe_reg[2][0]
From Clock : clk
To Clock : clk
Failed Paths : 0
Type : Clock Hold: 'pll0:inst12|altpll:altpll_component|_clk1'
Slack : 0.983 ns
Required Time : 25.00 MHz ( period = 40.000 ns )
Actual Time : N/A
From : lpm_counter2:inst18|lpm_counter:lpm_counter_component|cntr_5k8:auto_generated|safe_q[19]
To : lpm_counter2:inst18|lpm_counter:lpm_counter_component|cntr_5k8:auto_generated|safe_q[19]
From Clock : pll0:inst12|altpll:altpll_component|_clk1
To Clock : pll0:inst12|altpll:altpll_component|_clk1
Failed Paths : 0
Type : Clock Hold: 'pll0:inst12|altpll:altpll_component|_clk0'
Slack : 1.072 ns
Required Time : 20.00 MHz ( period = 50.000 ns )
Actual Time : N/A
From : fspi:inst|clkcount[31]~reg0
To : fspi:inst|clkcount[31]~reg0
From Clock : pll0:inst12|altpll:altpll_component|_clk0
To Clock : pll0:inst12|altpll:altpll_component|_clk0
Failed Paths : 0
Type : Clock Hold: 'spiclk'
Slack : Not operational: Clock Skew > Data Delay
Required Time : None
Actual Time : N/A
From : fspi:inst|count[5]~reg0
To : fifo0:inst1|dcfifo:dcfifo_component|dcfifo_miu:auto_generated|scfifo:output_channel|a_fffifo:subfifo|a_fefifo:fifo_state|state_empty
From Clock : spiclk
To Clock : spiclk
Failed Paths : 820
Type : Total number of failed paths
Slack :
Required Time :
Actual Time :
From :
To :
From Clock :
To Clock :
Failed Paths : 820
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