stack.vhd

Dieses Verzeichnis enthaelt die VHDL-Quelltexte zur Beschreibung eines "Stack-Speichers"

-- VHDL Model Created from SGE Symbol stack.sym -- Nov 13 11:02:48 1996

library IEEE;
   use IEEE.std_logic_1164.all;
   use IEEE.std_logic_misc.all;
   use IEEE.std_logic_arith.all;
   use IEEE.std_logic_components.all;


entity STACK is
      Port (     CLK : In    std_logic;
                   D : In    std_logic_vector (1 to 12);
                 DIR : In    std_logic;
                  RN : In    std_logic;
                   Q : Out   std_logic_vector (1 to 12) );

end STACK;


architecture BEHAVIORAL of STACK is
type REG_FELD is Array (Integer Range 1 to 8) of std_logic_vector (1 to 12);
signal STACK_REG :  REG_FELD register;
Signal  NULLVECTOR : Std_Logic_Vector (1 to 12) := "000000000000";

begin

 --  Verhaltensbeschreibung der Stack-Funktionen

 INTERN: process (CLK, RN)  
   variable TEMP : REG_FELD := ("000000000000" ,"000000000000", "000000000000", "000000000000", "000000000000" , "000000000000", "000000000000","000000000000") ;
	begin

	-- RESET
	if ( RN='0') then
	  for I in 1 to 8 loop
	    STACK_REG(I) <= NULLVECTOR;
	  end loop;

	-- PUSH
	elsif ( CLK'event and CLK='1'  ) then
	  if  DIR='1' then
	    for I in 8 downto 1 loop
	      TEMP(I) := STACK_REG(I);
	    end loop;
	    for I in 8 downto 2 loop
	      TEMP(I) := TEMP(I-1);
	    end loop;
	    TEMP(1) := D;
	    for I in 8 downto 1 loop
	      STACK_REG(I) <= TEMP(I) after 5 ns;
	    end loop;
	  else

 -- POP
	    for I in 8 downto 1 loop
	      TEMP(I) := STACK_REG(I);
	    end loop;
	    for I in 1 to 7 loop
	      TEMP(I) := TEMP(I+1);
	    end loop;
	    TEMP(8) := NULLVECTOR;
	    for I in 8 downto 1 loop
	      STACK_REG(I) <= TEMP(I) after 5 ns;
	    end loop;
	  end if;
	end if;
--      wait on CLK, RN ;
  end process;

--   Beschreibung der Ausgabesteuerung

 WOUT: process (CLK, RN)
    begin
	if RN='1' then
	  if (CLK'event and CLK='0' )  then
	    Q <= STACK_REG(1);
	  elsif ( RN='0' ) then
	    Q <= STACK_REG(1);
	  end if;
	end if;
--      wait on CLK, RN ;
  end process;

end BEHAVIORAL;


configuration CFG_STACK_BEHAVIORAL of STACK is
   for BEHAVIORAL

   end for;

end CFG_STACK_BEHAVIORAL;