pwm.vhd

实现PWM波的产生,可用于电机控制.可以改变其占空比及频率来实现电机的调速.

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity PWM is
	port(clk,reset,conv,add,sub:in std_logic;bout:out std_logic);
end PWM;
architecture Behavioral of PWM is
 type state is (st0,st1,st2);
 signal s: state; signal ff:integer range 0 to 10;
 signal high:integer range 0 to 100;signal clk3:std_logic;
 begin 
   
   
 process(reset,add,sub,clk,conv)
variable H: integer range 0 to 100; variable ss : integer range 0 to 10 ;
begin
 if reset='0' then s<=st0; H:=50;ss:=1;
 elsif clk'event and clk='1' then
  case s is when st0=>if add='0' then s<=st1;
						elsif sub='0' then s<=st2;
						end if;
			when st1=>if add='1' then
					  if conv='1' then H:=H+1;s<=st0;
						else ss:=ss+1;s<=st0;
						end if;
						end if;
			when st2=>if sub='1' then 
                      if conv='1' then s<=st0; H:=H-1;
						else ss:=ss-1;s<=st0;
						end if ;
					end if;
   end case;
   end if;
    high<=H;ff<=ss;
 end process;



process (clk, reset, ff)
  variable count1:integer range 0 to 300;variable clkout:std_logic;
begin
if reset='0' then count1:=0;clkout:='1';
 elsif clk'event and clk='1' then count1:=count1+ff;
  if count1>=255 then count1:=0;
   elsif count1<=ff then clkout:='0';
     else clkout:='1';
    end if;
 end if;
  clk3<=clkout;
  end process;
  
  
  
 pwm : process(reset,clk3,high)
 variable count:integer range 0 to 100;variable bclk0:std_logic;
 begin
 if reset='0' then bclk0:='0';count:=0;
   elsif clk3'event and clk3='1' then count:=count+1;
     if count=99 then count:=0;
       elsif count<high then bout<='1';
         else bout<='0';
          end if;
          end if;
   end process pwm;
end Behavioral;