pwm.fit.rpt

实现PWM波的产生,可用于电机控制.可以改变其占空比及频率来实现电机的调速.

+--------------------------------------------------------------------+--------------------------------+--------------------------------+


+----------------------------------------------+
; Incremental Compilation Preservation Summary ;
+-------------------------+--------------------+
; Type                    ; Value              ;
+-------------------------+--------------------+
; Placement               ;                    ;
;     -- Requested        ; 0 / 110 ( 0.00 % ) ;
;     -- Achieved         ; 0 / 110 ( 0.00 % ) ;
;                         ;                    ;
; Routing (by Connection) ;                    ;
;     -- Requested        ; 0 / 0 ( 0.00 % )   ;
;     -- Achieved         ; 0 / 0 ( 0.00 % )   ;
+-------------------------+--------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------+
; Incremental Compilation Partition Settings                                                                                                       ;
+----------------+----------------+-------------------+-------------------------+------------------------+------------------------------+----------+
; Partition Name ; Partition Type ; Netlist Type Used ; Preservation Level Used ; Netlist Type Requested ; Preservation Level Requested ; Contents ;
+----------------+----------------+-------------------+-------------------------+------------------------+------------------------------+----------+
; Top            ; User-created   ; Source File       ; N/A                     ; Source File            ; N/A                          ;          ;
+----------------+----------------+-------------------+-------------------------+------------------------+------------------------------+----------+


+--------------------------------------------------------------------------------------------+
; Incremental Compilation Placement Preservation                                             ;
+----------------+---------+-------------------+-------------------------+-------------------+
; Partition Name ; # Nodes ; # Preserved Nodes ; Preservation Level Used ; Netlist Type Used ;
+----------------+---------+-------------------+-------------------------+-------------------+
; Top            ; 110     ; 0                 ; N/A                     ; Source File       ;
+----------------+---------+-------------------+-------------------------+-------------------+


+--------------+
; Pin-Out File ;
+--------------+
The pin-out file can be found in D:/程序/PWM/PWM.pin.


+--------------------------------------------------------------------+
; Fitter Resource Usage Summary                                      ;
+---------------------------------------------+----------------------+
; Resource                                    ; Usage                ;
+---------------------------------------------+----------------------+
; Total logic elements                        ; 73 / 8,256 ( < 1 % ) ;
;     -- Combinational with no register       ; 42                   ;
;     -- Register only                        ; 0                    ;
;     -- Combinational with a register        ; 31                   ;
;                                             ;                      ;
; Logic element usage by number of LUT inputs ;                      ;
;     -- 4 input functions                    ; 29                   ;
;     -- 3 input functions                    ; 21                   ;
;     -- <=2 input functions                  ; 23                   ;
;     -- Register only                        ; 0                    ;
;                                             ;                      ;
; Logic elements by mode                      ;                      ;
;     -- normal mode                          ; 47                   ;
;     -- arithmetic mode                      ; 26                   ;
;                                             ;                      ;
; Total registers*                            ; 31 / 8,487 ( < 1 % ) ;
;     -- Dedicated logic registers            ; 31 / 8,256 ( < 1 % ) ;
;     -- I/O registers                        ; 0 / 231 ( 0 % )      ;
;                                             ;                      ;
; Total LABs:  partially or completely used   ; 6 / 516 ( 1 % )      ;
; User inserted logic elements                ; 0                    ;
; Virtual pins                                ; 0                    ;
; I/O pins                                    ; 6 / 85 ( 7 % )       ;
;     -- Clock pins                           ; 1 / 4 ( 25 % )       ;
; Global signals                              ; 3                    ;
; M4Ks                                        ; 0 / 36 ( 0 % )       ;
; Total block memory bits                     ; 0 / 165,888 ( 0 % )  ;
; Total block memory implementation bits      ; 0 / 165,888 ( 0 % )  ;
; Embedded Multiplier 9-bit elements          ; 0 / 36 ( 0 % )       ;
; PLLs                                        ; 0 / 2 ( 0 % )        ;
; Global clocks                               ; 3 / 8 ( 38 % )       ;
; JTAGs                                       ; 0 / 1 ( 0 % )        ;
; ASMI blocks                                 ; 0 / 1 ( 0 % )        ;
; CRC blocks                                  ; 0 / 1 ( 0 % )        ;
; Average interconnect usage (total/H/V)      ; 0% / 0% / 0%         ;
; Peak interconnect usage (total/H/V)         ; 0% / 0% / 0%         ;
; Maximum fan-out node                        ; reset~clkctrl        ;
; Maximum fan-out                             ; 30                   ;
; Highest non-global fan-out signal           ; s.st1                ;
; Highest non-global fan-out                  ; 12                   ;
; Total fan-out                               ; 325                  ;
; Average fan-out                             ; 2.80                 ;
+---------------------------------------------+----------------------+
*  Register count does not include registers inside RAM blocks or DSP blocks.



+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Input Pins                                                                                                                                                                                                                                                  ;
+-------+-------+----------+--------------+--------------+-------------+-----------------------+--------------------+--------+----------------+---------------+-----------------+----------+--------------+--------------+-------------+----------------------+
; Name  ; Pin # ; I/O Bank ; X coordinate ; Y coordinate ; Cell number ; Combinational Fan-Out ; Registered Fan-Out ; Global ; Input Register ; Power Up High ; PCI I/O Enabled ; Bus Hold ; Weak Pull Up ; I/O Standard ; Termination ; Location assigned by ;
+-------+-------+----------+--------------+--------------+-------------+-----------------------+--------------------+--------+----------------+---------------+-----------------+----------+--------------+--------------+-------------+----------------------+
; add   ; 28    ; 1        ; 0            ; 6            ; 0           ; 6                     ; 0                  ; no     ; no             ; no            ; no              ; no       ; Off          ; 3.3-V LVTTL  ; Off         ; Fitter               ;
; clk   ; 91    ; 3        ; 34           ; 10           ; 0           ; 2                     ; 0                  ; yes    ; no             ; no            ; no              ; no       ; Off          ; 3.3-V LVTTL  ; Off         ; User                 ;
; conv  ; 52    ; 4        ; 12           ; 0            ; 1           ; 7                     ; 0                  ; no     ; no             ; no            ; no              ; no       ; Off          ; 3.3-V LVTTL  ; Off         ; Fitter               ;
; reset ; 90    ; 3        ; 34           ; 10           ; 1           ; 2                     ; 0                  ; yes    ; no             ; no            ; no              ; no       ; Off          ; 3.3-V LVTTL  ; Off         ; User                 ;
; sub   ; 24    ; 1        ; 0            ; 8            ; 0           ; 7                     ; 0                  ; no     ; no             ; no            ; no              ; no       ; Off          ; 3.3-V LVTTL  ; Off         ; Fitter               ;
+-------+-------+----------+--------------+--------------+-------------+-----------------------+--------------------+--------+----------------+---------------+-----------------+----------+--------------+--------------+-------------+----------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Output Pins                                                                                                                                                                                                                                                                           ;
+------+-------+----------+--------------+--------------+-------------+-----------------+------------------------+---------------+-----------------+------------+---------------+----------+--------------+--------------+------------------+-------------+----------------------+------+
; Name ; Pin # ; I/O Bank ; X coordinate ; Y coordinate ; Cell number ; Output Register ; Output Enable Register ; Power Up High ; PCI I/O Enabled ; Open Drain ; TRI Primitive ; Bus Hold ; Weak Pull Up ; I/O Standard ; Current Strength ; Termination ; Location assigned by ; Load ;
+------+-------+----------+--------------+--------------+-------------+-----------------+------------------------+---------------+-----------------+------------+---------------+----------+--------------+--------------+------------------+-------------+----------------------+------+
; bout ; 4     ; 1        ; 0            ; 18           ; 3           ; no              ; no                     ; no            ; no              ; no         ; no            ; no       ; Off          ; 3.3-V LVTTL  ; 24mA             ; Off         ; User                 ; 0 pF ;
+------+-------+----------+--------------+--------------+-------------+-----------------+------------------------+---------------+-----------------+------------+---------------+----------+--------------+--------------+------------------+-------------+----------------------+------+


+-----------------------------------------------------------+
; I/O Bank Usage                                            ;
+----------+-----------------+---------------+--------------+
; I/O Bank ; Usage           ; VCCIO Voltage ; VREF Voltage ;
+----------+-----------------+---------------+--------------+
; 1        ; 5 / 17 ( 29 % ) ; 3.3V          ; --           ;
; 2        ; 0 / 23 ( 0 % )  ; 3.3V          ; --           ;
; 3        ; 3 / 21 ( 14 % ) ; 3.3V          ; --           ;
; 4        ; 1 / 24 ( 4 % )  ; 3.3V          ; --           ;
+----------+-----------------+---------------+--------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; All Package Pins                                                                                                                                                       ;
+----------+------------+----------+------------------------------------------+--------+--------------+---------+------------+-----------------+----------+--------------+
; Location ; Pad Number ; I/O Bank ; Pin Name/Usage                           ; Dir.   ; I/O Standard ; Voltage ; I/O Type   ; User Assignment ; Bus Hold ; Weak Pull Up ;
+----------+------------+----------+------------------------------------------+--------+--------------+---------+------------+-----------------+----------+--------------+
; 1        ; 0          ; 1        ; ~ASDO~ / RESERVED_INPUT_WITH_WEAK_PULLUP ; input  ; 3.3-V LVTTL  ;         ; Row I/O    ; N               ; no       ; On           ;