door_control.v

自动门控制程序 VERILOG编写！！！

module Door_Control(
					 Reset,
					 En,
					 Clock_1Hz,
					 Floor_Arrive,
					 Slave_Request_Arrive,
					 Ahead_Request,
					 Delay_Request,
					 Door_on_off					 
					 );
input  Reset;
input  En;
input  Clock_1Hz;
input  Floor_Arrive;
input  Slave_Request_Arrive;
input  Ahead_Request;
input  Delay_Request;
output Door_on_off;

reg Door_on_off;
reg [2:0] CNT;
reg CNT_EN; 

//Delay
always @(posedge Clock_1Hz)
begin
  if(CNT_EN == 1'b1)
    CNT <= CNT + 3'b1;
  else
    CNT <= 1'b0;
end

always @(Reset or En or CNT
          or Floor_Arrive or Slave_Request_Arrive 
          or Ahead_Request or Delay_Request)
begin
  if( (Reset == 1'b1) || (En == 1'b1) )
    begin
      Door_on_off <= 1'b0;
      CNT_EN <= 1'b0;
    end
  else
    begin
      if( (Floor_Arrive == 1'b1) || (Slave_Request_Arrive == 1'b1) )
        begin
          Door_on_off <= 1'b1;
          //CNT <= 3'b0;
          CNT_EN <= 1'b1;
        end
      else if(CNT == 3'b111)
        begin
          CNT_EN <= 1'b0;
          Door_on_off <= 1'b0;
        end
      else if(Ahead_Request == 1'b1)
        begin
          Door_on_off <= 1'b0;
          CNT_EN <= 1'b0;
        end
      else if(Delay_Request == 1'b1)
        begin
          Door_on_off <= 1'b1;
          CNT_EN <= 1'b0;
        end
      else
        begin
          Door_on_off <= 1'b0;
          CNT_EN <= 1'b0;
        end
    end
end

endmodule