generated_app.mk

RT8019网络控制器在FPGA中的驱动设计

# generated_app.mk
#
# Machine generated for a CPU named "cpu" as defined in:
# E:\code\EP1C6\l_standard\stand.ptf
#
# Generated: 2006-04-19 14:56:27.546

# DO NOT MODIFY THIS FILE
#
#   Changing this file will have subtle consequences
#   which will almost certainly lead to a nonfunctioning
#   system. If you do modify this file, be aware that your
#   changes will be overwritten and lost when this file
#   is generated again.
#
# DO NOT MODIFY THIS FILE

# assuming the Quartus project directory is the same as the PTF directory
QUARTUS_PROJECT_DIR = E:/code/EP1C6/l_standard

# the simulation directory is a subdirectory of the PTF directory
SIMDIR = $(QUARTUS_PROJECT_DIR)/stand_sim

# macros defined by/for ext_flash
EXT_FLASH_FLASHTARGET_ALT_SIM_PREFIX = $(EXT_FLASH_FLASHTARGET_TMP1:0=)
EXT_FLASH_FLASHTARGET_TMP1 = $(ALT_SIM_OPTIMIZE:1=RUN_ON_HDL_SIMULATOR_ONLY_)
BOOT_COPIER = boot_loader_cfi.srec
CPU_CLASS = altera_nios2
CPU_RESET_ADDRESS = 0x0


all: delete_placeholder_warning flashfiles sim

delete_placeholder_warning: do_delete_placeholder_warning
.PHONY: delete_placeholder_warning

flashfiles: $(EXT_FLASH_FLASHTARGET_ALT_SIM_PREFIX)ext_flash.flash
.PHONY: flashfiles

programflash: ext_flash_programflash
.PHONY: programflash

programflashnoelfdependency: ext_flash_programflashnoelf
.PHONY: programflashnoelfdependency

sim: $(SIMDIR)/dummy_file
.PHONY: sim

verifysysid: dummy_verifysysid_file
.PHONY: verifysysid

do_delete_placeholder_warning:
	rm -f $(SIMDIR)/contents_file_warning.txt
.PHONY: do_delete_placeholder_warning

$(EXT_FLASH_FLASHTARGET_ALT_SIM_PREFIX)ext_flash.flash: $(ELF)
	@echo Post-processing to create $(notdir $@)
	elf2flash --input=$(ELF) --flash=U5 --boot=$(shell $(QUARTUS_ROOTDIR)/sopc_builder/bin/find_sopc_component_dir $(CPU_CLASS))/$(BOOT_COPIER) --outfile=$(EXT_FLASH_FLASHTARGET_ALT_SIM_PREFIX)ext_flash.flash --sim_optimize=$(ALT_SIM_OPTIMIZE) --base=0x0 --end=0x3FFFFF --reset=$(CPU_RESET_ADDRESS)

ext_flash_programflash: $(EXT_FLASH_FLASHTARGET_ALT_SIM_PREFIX)ext_flash.flash
	nios2-flash-programmer --input=$(EXT_FLASH_FLASHTARGET_ALT_SIM_PREFIX)ext_flash.flash --sof=$(shell $(QUARTUS_ROOTDIR)/sopc_builder/bin/find_sopc_component_dir rca_cy1c12_board)/system/rca_cy1c12_board.sof --device=1 $(JTAG_CABLE) --base=0x00400000
.PHONY: ext_flash_programflash

ext_flash_programflashnoelf:
	nios2-flash-programmer --input=$(EXT_FLASH_FLASHTARGET_ALT_SIM_PREFIX)ext_flash.flash --sof=$(shell $(QUARTUS_ROOTDIR)/sopc_builder/bin/find_sopc_component_dir rca_cy1c12_board)/system/rca_cy1c12_board.sof --device=1 $(JTAG_CABLE) --base=0x00400000
.PHONY: ext_flash_programflashnoelf

$(SIMDIR)/dummy_file: $(ELF)
	if [ ! -d $(SIMDIR) ]; then mkdir $(SIMDIR) ; fi
	@echo Hardware simulation is not enabled for the target SOPC Builder system. Skipping creation of hardware simulation model contents and simulation symbol files. \(Note: This does not affect the instruction set simulator.\)
	touch $(SIMDIR)/dummy_file

dummy_verifysysid_file:
	nios2-download $(JTAG_CABLE)                                --sidp=0x004000F8 --id=3066103290 --timestamp=1143897287
.PHONY: dummy_verifysysid_file


generated_app_clean:
	$(RM) $(EXT_FLASH_FLASHTARGET_ALT_SIM_PREFIX)ext_flash.flash
	$(RM) $(SIMDIR)/dummy_file
.PHONY: generated_app_clean