wuxian.fit.summary

来自「串口8位数据 verilog hdl提取」· SUMMARY 代码 · 共 17 行

SUMMARY
17
字号
Fitter Status : Successful - Fri May 22 09:01:54 2009
Quartus II Version : 7.2 Build 151 09/26/2007 SJ Full Version
Revision Name : wuxian
Top-level Entity Name : wuxian_test
Family : Cyclone II
Device : EP2C35F484C8
Timing Models : Final
Total logic elements : 73 / 33,216 ( < 1 % )
    Total combinational functions : 65 / 33,216 ( < 1 % )
    Dedicated logic registers : 46 / 33,216 ( < 1 % )
Total registers : 46
Total pins : 19 / 322 ( 6 % )
Total virtual pins : 0
Total memory bits : 0 / 483,840 ( 0 % )
Embedded Multiplier 9-bit elements : 0 / 70 ( 0 % )
Total PLLs : 0 / 4 ( 0 % )

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