counter16_top.gfl

一个verilog源代码

# XST (Creating Lso File) : 
counter16_top.lso
# xst flow : RunXST
counter16_top.syr
counter16_top.prj
counter16_top.sprj
counter16_top.ana
counter16_top.stx
counter16_top.cmd_log
counter16_top.ngc
counter16_top.ngr
# Implmentation : Translate
__projnav/ngdbuild.err
__projnav/ednTOngd_tcl.rsp
f:\trainsilicon\fpgaschool\testcade\fpga40xc200\basic1\examples\counter16\ise\counter16_top.v/_ngo
counter16_top.ngd
counter16_top_ngdbuild.nav
counter16_top.bld
.untf
counter16_top.cmd_log
# Assign Package Pins
__projnav/parentAssignPackagePinsApp_tcl.rsp
# Implmentation : Translate
__projnav/ngdbuild.err
__projnav/ednTOngd_tcl.rsp
f:\trainsilicon\fpgaschool\testcade\fpga40xc200\basic1\examples\counter16\ise\counter16_top.v/_ngo
counter16_top.ngd
counter16_top_ngdbuild.nav
counter16_top.bld
counter16_top.ucf.untf
counter16_top.cmd_log
# Implementation : Map
counter16_top_map.ncd
counter16_top.ngm
counter16_top.pcf
counter16_top.nc1
counter16_top.mrp
counter16_top_map.mrp
counter16_top.mdf
__projnav/map.log
counter16_top.cmd_log
MAP_NO_GUIDE_FILE_CPF "counter16_top"
# Implmentation : Post-Place & Route Timing
__projnav/ncdTOtwr_tcl.rsp
__projnav/posttrc.log
counter16_top.twr
counter16_top.twx
counter16_top.tsi
counter16_top.cmd_log
# Implmentation : Place & Route
__projnav/nc1TOncd_tcl.rsp
counter16_top.ncd
counter16_top.par
counter16_top.pad
counter16_top_pad.txt
counter16_top_pad.csv
counter16_top.pad_txt
counter16_top.dly
reportgen.log
counter16_top.xpi
counter16_top.grf
counter16_top.itr
counter16_top_last_par.ncd
__projnav/par.log
counter16_top.placed_ncd_tracker
counter16_top.routed_ncd_tracker
counter16_top.cmd_log
PAR_NO_GUIDE_FILE_CPF "counter16_top"
# Generate Programming File
__projnav/counter16_top_ncdTOut_tcl.rsp
__projnav/bitgen.rsp
bitgen.ut
counter16_top.ut
# Programming File Generation Report
counter16_top.bgn
counter16_top.rbt
counter16_top.ll
counter16_top.msk
counter16_top.drc
counter16_top.nky
counter16_top.bit
counter16_top.bin
counter16_top.isc
counter16_top.cmd_log