prev_cmp_jianzhong.tan.qmsg

最基本的vhdl程序

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Classic Timing Analyzer Quartus II " "Info: Running Quartus II Classic Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 7.2 Build 151 09/26/2007 SJ Full Version " "Info: Version 7.2 Build 151 09/26/2007 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_TIME" "Wed Apr 01 19:24:51 2009 " "Info: Processing started: Wed Apr 01 19:24:51 2009" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_tan --read_settings_files=off --write_settings_files=off jianzhong -c jianzhong " "Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off jianzhong -c jianzhong" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0}
{ "Info" "IDAT_DAT_STARTED" "" "Info: Started post-fitting delay annotation" {  } {  } 0 0 "Started post-fitting delay annotation" 0 0 "" 0}
{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0 0 "Delay annotation completed successfully" 0 0 "" 0}
{ "Warning" "WTDB_FOUND_COMB_LATCHES" "" "Warning: Timing Analysis found one or more latches implemented as combinational loops" { { "Warning" "WTDB_COMB_LATCH_NODE" "f\[1\] " "Warning: Node \"f\[1\]\" is a latch" {  } { { "jianzhong.vhd" "" { Text "E:/EDA/林璐雅/时钟按键1/jianzhong.vhd" 11 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0} { "Warning" "WTDB_COMB_LATCH_NODE" "f\[2\] " "Warning: Node \"f\[2\]\" is a latch" {  } { { "jianzhong.vhd" "" { Text "E:/EDA/林璐雅/时钟按键1/jianzhong.vhd" 11 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0} { "Warning" "WTDB_COMB_LATCH_NODE" "f\[0\] " "Warning: Node \"f\[0\]\" is a latch" {  } { { "jianzhong.vhd" "" { Text "E:/EDA/林璐雅/时钟按键1/jianzhong.vhd" 11 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0 "" 0}  } {  } 0 0 "Timing Analysis found one or more latches implemented as combinational loops" 0 0 "" 0}