jianzhong.tan.summary

最基本的vhdl程序

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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : 24.900 ns
From           : s5
To             : \x3:t[0]
From Clock     : --
To Clock       : clk
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 11.200 ns
From           : y[7]~reg0
To             : y[7]
From Clock     : clk
To Clock       : --
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : -4.200 ns
From           : clr
To             : lpm_counter:\x2:i[0]_rtl_2|alt_counter_f10ke:wysi_counter|q[8]
From Clock     : --
To Clock       : clk
Failed Paths   : 0

Type           : Clock Setup: 'clk'
Slack          : N/A
Required Time  : None
Actual Time    : 64.10 MHz ( period = 15.600 ns )
From           : lpm_counter:\x2:i[0]_rtl_2|alt_counter_f10ke:wysi_counter|q[3]
To             : lpm_counter:c_rtl_1|alt_counter_f10ke:wysi_counter|q[0]
From Clock     : clk
To Clock       : clk
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

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