jianzhong.map.eqn

最基本的vhdl程序

--clk is clk
--operation mode is input

clk = INPUT();


--clr is clr
--operation mode is input

clr = INPUT();


--s0 is s0
--operation mode is input

s0 = INPUT();


--s1 is s1
--operation mode is input

s1 = INPUT();


--s2 is s2
--operation mode is input

s2 = INPUT();


--s3 is s3
--operation mode is input

s3 = INPUT();


--s4 is s4
--operation mode is input

s4 = INPUT();


--s5 is s5
--operation mode is input

s5 = INPUT();


--s6 is s6
--operation mode is input

s6 = INPUT();


--ds[3] is ds[3]
--operation mode is output

ds[3] = OUTPUT(GND);


--ds[2] is ds[2]
--operation mode is output

ds[2] = OUTPUT(GND);


--ds[1] is ds[1]
--operation mode is output

ds[1] = OUTPUT(GND);


--ds[0] is ds[0]
--operation mode is output

ds[0] = OUTPUT(GND);


--y[7] is y[7]
--operation mode is output

y[7] = OUTPUT(VCC);


--y[6] is y[6]
--operation mode is output

y[6] = OUTPUT(VCC);


--y[5] is y[5]
--operation mode is output

y[5] = OUTPUT(VCC);


--y[4] is y[4]
--operation mode is output

y[4] = OUTPUT(VCC);


--y[3] is y[3]
--operation mode is output

y[3] = OUTPUT(VCC);


--y[2] is y[2]
--operation mode is output

y[2] = OUTPUT(VCC);


--y[1] is y[1]
--operation mode is output

y[1] = OUTPUT(GND);


--y[0] is y[0]
--operation mode is output

y[0] = OUTPUT(VCC);