hd7279.h

基于FPGA 的直接数字频率合成信号发生器(DDS)设计

#ifndef _HD7279_H_INCLUDED_
#define _HD7279_H_INCLUDED_

#include "AT51S_89C52.h"

#ifdef _HD7279_C_Def
	sbit cs_HD7279 = P1^4; //
	sbit clk_HD7279 = P1^5; //
	sbit dat_HD7279 = P1^6; //
	sbit key_HD7279 = P3^3; //
	#define Ext_HD7279
#else
	extern bit cs_HD7279; // 
	extern bit clk_HD7279; // 
	extern bit dat_HD7279; // 
	extern bit key_HD7279; // 
	#define Ext_HD7279 extern 
#endif


//向HD7279发送纯指令
//cmd: 指令
Ext_HD7279 void SendInstructTo7279(unsigned char cmd);
//bitNo:0~7, 要设置那一位LED
//data: 该位LED要显示的数据, 格式为: DP|X|X|X|d3|d2|d1|d0 ,其中DP为小数点, X=无影响 , d0~d3为数据
//transMode: 0=译码方式0; 1=译码方式1;others=不译码
Ext_HD7279 unsigned char SetupLedData(unsigned char bitNo, unsigned char dat, unsigned char transMode);
//flashCon: d8|...|d1 , d1到d8分别对应数码管1-8, 0=闪烁, 1=不闪烁
Ext_HD7279 void Flash7279(unsigned char flashCon);
//hideCon: d8|...|d1 , d1到d8分别对应数码管1-8, 0=消隐, 1=显示
Ext_HD7279 void Hide7279(unsigned char hideCon);
//conOn:  X|X|d6|...|d1, d0-d5范围为00H-3FH .从第1个数码管到第8个数码管,从G段到A,DP段 依次为每段编码.
Ext_HD7279 void SegOn7279(unsigned char conOn);
//conOff:  X|X|d6|...|d1, d0-d5范围为00H-3FH .从第1个数码管到第8个数码管,从G段到A,DP段 依次为每段编码.
Ext_HD7279 void SegOff7279(unsigned char conOff);
Ext_HD7279 unsigned char Read7279KeyCode(void);

//****** HD7279A ******
#define CMD_RESET 0xa4        //复位指令
#define CMD_TEST 0xbf         //测试指令
#define DECODE0 0x80          //下载数据并按0方式译码,需要与具体数据下在其它格式作位或运算
#define DECODE1 0xc8          //下载数据并按1方式译码,需要与具体数据下在其它格式作位或运算
#define CMD_READ 0x15         //读键盘
#define UNDECODE 0x90         //下载数据不译码,需要与具体数据下在其它格式作位或运算
#define RTL_CYCLE 0xa3        //循环左移指令 
#define RTR_CYCLE 0xa2        //循环右移指令 
#define RTL_UNCYL 0xa1        //左移指令
#define RTR_UNCYL 0xa0        //右移指令
#define ACTCTL 0x98           //消隐控制,后跟控制数据
#define SEGON 0xe0            //段点亮指令,后跟控制数据
#define SEGOFF 0xc0           //端关闭指令,后跟控制数据
#define BLINKCTL 0x88         //闪烁控制,后跟控制数据


#endif