orm2.vhd

计数器、频率计、优先编码器、数码管扫描电路、数据选择器

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
ENTITY orm2 IS
	PORT(
		a,b		: IN	STD_LOGIC;
		c		: OUT	STD_LOGIC);
END orm2;
ARCHITECTURE art1 OF orm2 IS
	--SIGNAL __signal_name : STD_LOGIC;
	--SIGNAL __signal_name : STD_LOGIC;
BEGIN
	c<=a or b;
END art1;