led.map.summary

来自「用VHDL开发的数字钟资料 完整的实验代码」· SUMMARY 代码 · 共 9 行

Analysis & Synthesis Status : Successful - Wed Apr 22 22:19:41 2009
Quartus II Version : 8.1 Build 163 10/28/2008 SJ Full Version
Revision Name : led
Top-level Entity Name : led
Family : FLEX10K
Total logic elements : 119
Total pins : 35
Total memory bits : 0