prev_cmp_clock.map.qmsg

用VHDL开发的数字钟资料 完整的实验代码

{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "b1\[5\] led.vhd(106) " "Info (10041): Inferred latch for \"b1\[5\]\" at led.vhd(106)" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/clock/led.vhd" 106 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "b1\[6\] led.vhd(106) " "Info (10041): Inferred latch for \"b1\[6\]\" at led.vhd(106)" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/clock/led.vhd" 106 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "c\[0\] led.vhd(77) " "Info (10041): Inferred latch for \"c\[0\]\" at led.vhd(77)" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/clock/led.vhd" 77 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "c\[1\] led.vhd(77) " "Info (10041): Inferred latch for \"c\[1\]\" at led.vhd(77)" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/clock/led.vhd" 77 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "c\[2\] led.vhd(77) " "Info (10041): Inferred latch for \"c\[2\]\" at led.vhd(77)" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/clock/led.vhd" 77 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "c\[3\] led.vhd(77) " "Info (10041): Inferred latch for \"c\[3\]\" at led.vhd(77)" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/clock/led.vhd" 77 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "c\[4\] led.vhd(77) " "Info (10041): Inferred latch for \"c\[4\]\" at led.vhd(77)" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/clock/led.vhd" 77 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "c\[5\] led.vhd(77) " "Info (10041): Inferred latch for \"c\[5\]\" at led.vhd(77)" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/clock/led.vhd" 77 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "c\[6\] led.vhd(77) " "Info (10041): Inferred latch for \"c\[6\]\" at led.vhd(77)" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/clock/led.vhd" 77 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "c1\[0\] led.vhd(77) " "Info (10041): Inferred latch for \"c1\[0\]\" at led.vhd(77)" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/clock/led.vhd" 77 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "c1\[1\] led.vhd(77) " "Info (10041): Inferred latch for \"c1\[1\]\" at led.vhd(77)" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/clock/led.vhd" 77 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "c1\[2\] led.vhd(77) " "Info (10041): Inferred latch for \"c1\[2\]\" at led.vhd(77)" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/clock/led.vhd" 77 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "c1\[3\] led.vhd(77) " "Info (10041): Inferred latch for \"c1\[3\]\" at led.vhd(77)" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/clock/led.vhd" 77 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "c1\[4\] led.vhd(77) " "Info (10041): Inferred latch for \"c1\[4\]\" at led.vhd(77)" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/clock/led.vhd" 77 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "c1\[5\] led.vhd(77) " "Info (10041): Inferred latch for \"c1\[5\]\" at led.vhd(77)" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/clock/led.vhd" 77 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "c1\[6\] led.vhd(77) " "Info (10041): Inferred latch for \"c1\[6\]\" at led.vhd(77)" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/clock/led.vhd" 77 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "d\[0\] led.vhd(48) " "Info (10041): Inferred latch for \"d\[0\]\" at led.vhd(48)" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/clock/led.vhd" 48 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "d\[1\] led.vhd(48) " "Info (10041): Inferred latch for \"d\[1\]\" at led.vhd(48)" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/clock/led.vhd" 48 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "d\[2\] led.vhd(48) " "Info (10041): Inferred latch for \"d\[2\]\" at led.vhd(48)" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/clock/led.vhd" 48 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "d\[3\] led.vhd(48) " "Info (10041): Inferred latch for \"d\[3\]\" at led.vhd(48)" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/clock/led.vhd" 48 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "d\[4\] led.vhd(48) " "Info (10041): Inferred latch for \"d\[4\]\" at led.vhd(48)" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/clock/led.vhd" 48 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "d\[5\] led.vhd(48) " "Info (10041): Inferred latch for \"d\[5\]\" at led.vhd(48)" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/clock/led.vhd" 48 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "d\[6\] led.vhd(48) " "Info (10041): Inferred latch for \"d\[6\]\" at led.vhd(48)" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/clock/led.vhd" 48 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "d1\[0\] led.vhd(48) " "Info (10041): Inferred latch for \"d1\[0\]\" at led.vhd(48)" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/clock/led.vhd" 48 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "d1\[1\] led.vhd(48) " "Info (10041): Inferred latch for \"d1\[1\]\" at led.vhd(48)" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/clock/led.vhd" 48 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "d1\[2\] led.vhd(48) " "Info (10041): Inferred latch for \"d1\[2\]\" at led.vhd(48)" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/clock/led.vhd" 48 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "d1\[3\] led.vhd(48) " "Info (10041): Inferred latch for \"d1\[3\]\" at led.vhd(48)" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/clock/led.vhd" 48 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "d1\[4\] led.vhd(48) " "Info (10041): Inferred latch for \"d1\[4\]\" at led.vhd(48)" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/clock/led.vhd" 48 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "d1\[5\] led.vhd(48) " "Info (10041): Inferred latch for \"d1\[5\]\" at led.vhd(48)" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/clock/led.vhd" 48 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "d1\[6\] led.vhd(48) " "Info (10041): Inferred latch for \"d1\[6\]\" at led.vhd(48)" {  } { { "led.vhd" "" { Text "G:/edatest/yulin/yulin/clock/clock/led.vhd" 48 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0 0}