graphics_pipeline.fit.summary

来自「Implementation of GPU (Graphics Processi」· SUMMARY 代码 · 共 17 行

Fitter Status : Successful - Tue Dec 09 23:28:15 2008
Quartus II Version : 8.0 Build 215 05/29/2008 SJ Full Version
Revision Name : graphics_pipeline
Top-level Entity Name : graphics_pipeline
Family : Cyclone II
Device : EP2C35F672C6
Timing Models : Final
Total logic elements : 23,654 / 33,216 ( 71 % )
    Total combinational functions : 23,646 / 33,216 ( 71 % )
    Dedicated logic registers : 2,200 / 33,216 ( 7 % )
Total registers : 2200
Total pins : 126 / 475 ( 27 % )
Total virtual pins : 0
Total memory bits : 391,680 / 483,840 ( 81 % )
Embedded Multiplier 9-bit elements : 54 / 70 ( 77 % )
Total PLLs : 1 / 4 ( 25 % )