📄 graphics_pipeline.fit.rpt
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Fitter report for graphics_pipeline
Tue Dec 09 23:28:18 2008
Quartus II Version 8.0 Build 215 05/29/2008 SJ Full Version
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; Table of Contents ;
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1. Legal Notice
2. Fitter Summary
3. Fitter Settings
4. Fitter Partition Preservation Settings
5. Fitter Netlist Optimizations
6. Pin-Out File
7. Fitter Resource Usage Summary
8. Input Pins
9. Output Pins
10. Bidir Pins
11. I/O Bank Usage
12. All Package Pins
13. PLL Summary
14. PLL Usage
15. Output Pin Default Load For Reported TCO
16. Fitter Resource Utilization by Entity
17. Delay Chain Summary
18. Pad To Core Delay Chain Fanout
19. Control Signals
20. Global & Other Fast Signals
21. Non-Global High Fan-Out Signals
22. Fitter RAM Summary
23. Fitter DSP Block Usage Summary
24. DSP Block Details
25. Interconnect Usage Summary
26. LAB Logic Elements
27. LAB-wide Signals
28. LAB Signals Sourced
29. LAB Signals Sourced Out
30. LAB Distinct Inputs
31. Fitter Device Options
32. Operating Settings and Conditions
33. Fitter Messages
34. Fitter Suppressed Messages
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; Legal Notice ;
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Copyright (C) 1991-2008 Altera Corporation
Your use of Altera Corporation's design tools, logic functions
and other software and tools, and its AMPP partner logic
functions, and any output files from any of the foregoing
(including device programming or simulation files), and any
associated documentation or information are expressly subject
to the terms and conditions of the Altera Program License
Subscription Agreement, Altera MegaCore Function License
Agreement, or other applicable license agreement, including,
without limitation, that your use is for the sole purpose of
programming logic devices manufactured by Altera and sold by
Altera or its authorized distributors. Please refer to the
applicable agreement for further details.
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; Fitter Summary ;
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