📄 char_7seg.fnsim.qmsg
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{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Functional Simulation Netlist Generation Quartus II " "Info: Running Quartus II Functional Simulation Netlist Generation" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 8.1 Build 163 10/28/2008 SJ Web Edition " "Info: Version 8.1 Build 163 10/28/2008 SJ Web Edition" { } { } 0 0 "%1!s!" 0 0 "" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Wed Mar 18 23:23:45 2009 " "Info: Processing started: Wed Mar 18 23:23:45 2009" { } { } 0 0 "Processing started: %1!s!" 0 0 "" 0 0} } { } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off char_7seg -c char_7seg --generate_functional_sim_netlist " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off char_7seg -c char_7seg --generate_functional_sim_netlist" { } { } 0 0 "Command: %1!s!" 0 0 "" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "char_7seg.vhd 4 2 " "Info: Found 4 design units, including 2 entities, in source file char_7seg.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 char_7seg-behavioral " "Info: Found design unit 1: char_7seg-behavioral" { } { { "char_7seg.vhd" "" { Text "S:/dda/lab1/char_7seg.vhd" 9 -1 0 } } } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "2 MUX3_1-behavior " "Info: Found design unit 2: MUX3_1-behavior" { } { { "char_7seg.vhd" "" { Text "S:/dda/lab1/char_7seg.vhd" 39 -1 0 } } } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 char_7seg " "Info: Found entity 1: char_7seg" { } { { "char_7seg.vhd" "" { Text "S:/dda/lab1/char_7seg.vhd" 5 -1 0 } } } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 0} { "Info" "ISGN_ENTITY_NAME" "2 MUX3_1 " "Info: Found entity 2: MUX3_1" { } { { "char_7seg.vhd" "" { Text "S:/dda/lab1/char_7seg.vhd" 32 -1 0 } } } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 0} } { } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "char_7seg " "Info: Elaborating entity \"char_7seg\" for the top level hierarchy" { } { } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "" 0 0}
{ "Info" "ILPMS_INFERENCING_SUMMARY" "2 " "Info: Inferred 2 megafunctions from design logic" { { "Info" "ILPMS_LPM_MUX_INFERRED" "Mux0 lpm_mux " "Info: Inferred mux megafunction (\"lpm_mux\") from the following logic: \"Mux0\"" { } { { "char_7seg.vhd" "Mux0" { Text "S:/dda/lab1/char_7seg.vhd" 14 -1 0 } } } 0 0 "Inferred mux megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0 0} { "Info" "ILPMS_LPM_MUX_INFERRED" "Mux1 lpm_mux " "Info: Inferred mux megafunction (\"lpm_mux\") from the following logic: \"Mux1\"" { } { { "char_7seg.vhd" "Mux1" { Text "S:/dda/lab1/char_7seg.vhd" 14 -1 0 } } } 0 0 "Inferred mux megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0 0} } { } 0 0 "Inferred %1!llu! megafunctions from design logic" 0 0 "" 0 0}
{ "Info" "ISGN_ELABORATION_HEADER" "lpm_mux:Mux0 " "Info: Elaborated megafunction instantiation \"lpm_mux:Mux0\"" { } { { "char_7seg.vhd" "" { Text "S:/dda/lab1/char_7seg.vhd" 14 -1 0 } } } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "lpm_mux:Mux0 " "Info: Instantiated megafunction \"lpm_mux:Mux0\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTH 1 " "Info: Parameter \"LPM_WIDTH\" = \"1\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_SIZE 4 " "Info: Parameter \"LPM_SIZE\" = \"4\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "LPM_WIDTHS 2 " "Info: Parameter \"LPM_WIDTHS\" = \"2\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "CASCADE_CHAIN IGNORE " "Info: Parameter \"CASCADE_CHAIN\" = \"IGNORE\"" { } { } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0 "" 0 0} } { { "char_7seg.vhd" "" { Text "S:/dda/lab1/char_7seg.vhd" 14 -1 0 } } } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0 "" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/mux_umc.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/mux_umc.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 mux_umc " "Info: Found entity 1: mux_umc" { } { { "db/mux_umc.tdf" "" { Text "S:/dda/lab1/db/mux_umc.tdf" 22 1 0 } } } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 0} } { } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Functional Simulation Netlist Generation 0 s 0 s Quartus II " "Info: Quartus II Functional Simulation Netlist Generation was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "214 " "Info: Peak virtual memory: 214 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 0} { "Info" "IQEXE_END_BANNER_TIME" "Wed Mar 18 23:23:46 2009 " "Info: Processing ended: Wed Mar 18 23:23:46 2009" { } { } 0 0 "Processing ended: %1!s!" 0 0 "" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Info: Elapsed time: 00:00:01" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 0} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:01 " "Info: Total CPU time (on all processors): 00:00:01" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 0} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 0}
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