📄 prev_cmp_char_7seg.tan.qmsg
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{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Classic Timing Analyzer Quartus II " "Info: Running Quartus II Classic Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 8.1 Build 163 10/28/2008 SJ Web Edition " "Info: Version 8.1 Build 163 10/28/2008 SJ Web Edition" { } { } 0 0 "%1!s!" 0 0 "" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Wed Mar 18 23:17:37 2009 " "Info: Processing started: Wed Mar 18 23:17:37 2009" { } { } 0 0 "Processing started: %1!s!" 0 0 "" 0 0} } { } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_tan --read_settings_files=off --write_settings_files=off char_7seg -c char_7seg --timing_analysis_only " "Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off char_7seg -c char_7seg --timing_analysis_only" { } { } 0 0 "Command: %1!s!" 0 0 "" 0 0}
{ "Info" "ITDB_FULL_TPD_RESULT" "SW\[0\] hex00\[5\] 5.740 ns Longest " "Info: Longest tpd from source pin \"SW\[0\]\" to destination pin \"hex00\[5\]\" is 5.740 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.026 ns) 1.026 ns SW\[0\] 1 PIN PIN_L22 4 " "Info: 1: + IC(0.000 ns) + CELL(1.026 ns) = 1.026 ns; Loc. = PIN_L22; Fanout = 4; PIN Node = 'SW\[0\]'" { } { { "d:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" "" { SW[0] } "NODE_NAME" } } { "char_7seg.vhd" "" { Text "S:/dda/lab1/char_7seg.vhd" 6 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.808 ns) + CELL(0.545 ns) 2.379 ns Mux1~21 2 COMB LCCOMB_X49_Y15_N0 2 " "Info: 2: + IC(0.808 ns) + CELL(0.545 ns) = 2.379 ns; Loc. = LCCOMB_X49_Y15_N0; Fanout = 2; COMB Node = 'Mux1~21'" { } { { "d:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" "1.353 ns" { SW[0] Mux1~21 } "NODE_NAME" } } { "char_7seg.vhd" "" { Text "S:/dda/lab1/char_7seg.vhd" 14 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.521 ns) + CELL(2.840 ns) 5.740 ns hex00\[5\] 3 PIN PIN_K22 0 " "Info: 3: + IC(0.521 ns) + CELL(2.840 ns) = 5.740 ns; Loc. = PIN_K22; Fanout = 0; PIN Node = 'hex00\[5\]'" { } { { "d:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" "3.361 ns" { Mux1~21 hex00[5] } "NODE_NAME" } } { "char_7seg.vhd" "" { Text "S:/dda/lab1/char_7seg.vhd" 7 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "4.411 ns ( 76.85 % ) " "Info: Total cell delay = 4.411 ns ( 76.85 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.329 ns ( 23.15 % ) " "Info: Total interconnect delay = 1.329 ns ( 23.15 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 0} } { { "d:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/81/quartus/bin/TimingClosureFloorplan.fld" "" "5.740 ns" { SW[0] Mux1~21 hex00[5] } "NODE_NAME" } } { "d:/altera/81/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "d:/altera/81/quartus/bin/Technology_Viewer.qrui" "5.740 ns" { SW[0] {} SW[0]~combout {} Mux1~21 {} hex00[5] {} } { 0.000ns 0.000ns 0.808ns 0.521ns } { 0.000ns 1.026ns 0.545ns 2.840ns } "" } } } 0 0 "%4!s! tpd from source pin \"%1!s!\" to destination pin \"%2!s!\" is %3!s!" 0 0 "" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Classic Timing Analyzer 0 s 0 s Quartus II " "Info: Quartus II Classic Timing Analyzer was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "161 " "Info: Peak virtual memory: 161 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 0} { "Info" "IQEXE_END_BANNER_TIME" "Wed Mar 18 23:17:37 2009 " "Info: Processing ended: Wed Mar 18 23:17:37 2009" { } { } 0 0 "Processing ended: %1!s!" 0 0 "" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:00 " "Info: Elapsed time: 00:00:00" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 0} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:00 " "Info: Total CPU time (on all processors): 00:00:00" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 0} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 0}
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