📄 dec32.vhd
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else
case cnt2 is
when "101"=>cnt2<="000";
when others=>cnt2<=cnt2+"001";
end case;
end if;
when others=>null;
end case;
cnt2_temp0<=cnt2;
cnt2_temp1<=cnt2_temp0;
tcnt2<=cnt2_temp1;
end if;
end process;
process(hclk)
begin
if hclk'event and hclk='1' then
case ite_num is
when "0000"=>
if ite_begin='1' then
cnt3<="11111";
else
case cnt2 is
when "000"=>case cnt3 is
when "11000"=>cnt3<="11000";
when others =>cnt3<=cnt3+"00001";
end case;
when others =>null;
end case;
end if;
when others=>null;
end case;
cnt3_temp<=read_highbit & cnt3;
bufrad_t0<=cnt3_temp & cnt2_temp1;
bufrad_t1<=bufrad_t0;
tcnt3<=cnt3;
tcntd3<=cnt3_temp;
tbrad<=bufrad_t1;
end if;
end process;
process(hclk)
begin
if hclk'event and hclk='1' then
read_highbit<=we_shift0;
case ite_num is
when "0000"=>
case cnt3 is
when "00000"=>case cnt2_temp0 is
when "000"=>bufre<='1';
when others=>null;
end case;
when "11000"=>case cnt2_temp0 is
when "000"=>bufre<='0';
when others=>null;
end case;
when others=>null;
end case;
when others=>bufre<='0';
end case;
bufret0<=bufre;
bufret1<=bufret0;
tbufre<=bufret1;
end if;
end process;
process(hclk)
begin
if hclk'event and hclk='1' then
case cnt2_temp0 is
when "000"=>romflag0<='1';
--when "001"=>romflag0<='1';
when others=>romflag0<='0';
end case;
case cnt3 is
when "00000"=>romflag1<='1';
when "00001"=>romflag1<='1';
when others=>romflag1<='0';
end case;
rflag0_t0<=romflag0;
rflag0_t1<=rflag0_t0;
rflag0_t2<=rflag0_t1;
rflag0_t3<=rflag0_t2;
rflag1_t0<=romflag1;
rflag1_t1<=rflag1_t0;
rflag1_t2<=rflag1_t1;
rflag1_t3<=rflag1_t2;
tromflag0<=rflag0_t3;
tromflag1<=rflag1_t3;
end if;
end process;
dembuf:bufram
port map
(data=>Qtemp0 & Itemp0,
rdaddress=>bufrad_t1,--cnt3_temp & cnt2_temp1,
rdclock=>hclk,
rden=>bufret1,
wraddress=>we_temp12 & cnt1 & cnt0,
wrclock=>clk,
wren=>'1',
q=>bufq
);
process(hclk)
begin
if hclk'event and hclk='1' then
case rflag1_t3 is
when '1'=>buf_q<="01111011110111101111";
when '0'=>case rflag0_t3 is
when '1'=>buf_q(19 downto 10)<=bufq(19 downto 10);
buf_q(9 downto 5)<="01111";
buf_q(4 downto 0)<="01111";
when '0'=>buf_q<=bufq;
end case;
end case;
tbufq<=bufq;
tbuf_q<=buf_q;
tbd0<=buf_q(4 downto 0);
tbd1<=buf_q(9 downto 5);
tbd2<=buf_q(14 downto 10);
tbd3<=buf_q(19 downto 15);
end if;
end process;
--===============================================
process(hclk)
begin
if hclk'event and hclk='1' then
if ite_begin='1' then
cnt4<="101";
else
case cnt4 is
when "101"=>cnt4<="000";
when others =>cnt4<=cnt4+"001";
end case;
end if;
cnt4_temp<=cnt4;
cnt4_temp1<=cnt4_temp;
--tcnt4<=cnt4_temp1;
end if;
end process;
process(hclk)
begin
if hclk'event and hclk='1' then
if ite_begin='1' then
cnt5<="11";
else
case cnt4 is
when "000"=>cnt5<=cnt5+"01";
when others =>null;
end case;
end if;
cnt5_temp<=cnt5;
--tcnt5<=cnt5_temp;
end if;
end process;
process(hclk)
begin
if hclk'event and hclk='1' then
if ite_begin='1' then
cnt6<="111";
elsif cnt4_temp="000" and cnt5="00" then
case cnt6 is
when "101"=>cnt6<="000";
when others=>cnt6<=cnt6+"001";
end case;
end if;
--tcnt6<=cnt6;
end if;
end process;
process(hclk)
begin
if hclk'event and hclk='1' then
case cnt5 is
when "00"=>re0<='1';
re3<='0';
when "01"=>re1<='1';
re0<='0';
when "10"=>re1<='0';
re2<='1';
when "11"=>re2<='0';
re3<='1';
end case;
--tre0<=re0;
--tre1<=re1;
--tre2<=re2;
--tre3<=re3;
end if;
end process;
process(hclk)
begin
if hclk'event and hclk='1' then
case ite_num(0) is
when '0'=>midbuf_sel<='1';
when '1'=>midbuf_sel<='0';
end case;
--tmbufsel<=midbuf_sel;
end if;
end process;
process(hclk)
begin
if hclk'event and hclk='1' then
case ite_num is
when "0000"|"0001"|"0010"|"0011"|"0100"=>alpha<='0';
when others=>alpha<='1';
end case;
end if;
end process;
--====================================
process(hclk)
begin
if hclk'event and hclk='1' then
case alpha is
when '0'=>
--mdata0_temp<=lle0(9) & lle0(9 downto 1);
--mdata1_temp<=lle1(9) & lle1(9 downto 1);
--mdata2_temp<=lle2(9) & lle2(9 downto 1);
--mdata3_temp<=lle3(9) & lle3(9 downto 1);
case lle0(9) is
when '0'=>case lle0(0) is
when '1'=>mdata0_temp<=lle0(9) & lle0(9 downto 1)+'1';
when '0'=>mdata0_temp<=lle0(9) & lle0(9 downto 1);
end case;
when '1'=>mdata0_temp<=lle0(9) & lle0(9 downto 1);
end case;
case lle1(9) is
when '0'=>case lle1(0) is
when '1'=>mdata1_temp<=lle1(9) & lle1(9 downto 1)+'1';
when '0'=>mdata1_temp<=lle1(9) & lle1(9 downto 1);
end case;
when '1'=>mdata1_temp<=lle1(9) & lle1(9 downto 1);
end case;
case lle2(9) is
when '0'=>case lle2(0) is
when '1'=>mdata2_temp<=lle2(9) & lle2(9 downto 1)+'1';
when '0'=>mdata2_temp<=lle2(9) & lle2(9 downto 1);
end case;
when '1'=>mdata2_temp<=lle2(9) & lle2(9 downto 1);
end case;
case lle3(9) is
when '0'=>case lle3(0) is
when '1'=>mdata3_temp<=lle3(9) & lle3(9 downto 1)+'1';
when '0'=>mdata3_temp<=lle3(9) & lle3(9 downto 1);
end case;
when '1'=>mdata3_temp<=lle3(9) & lle3(9 downto 1);
end case;
when '1'=>
mdata0_temp<=lle0;
mdata1_temp<=lle1;
mdata2_temp<=lle2;
mdata3_temp<=lle3;
end case;
--mdata0_temp<=lle0(8) & lle0(8 downto 1);
--mdata1_temp<=lle1(8) & lle1(8 downto 1);
--mdata2_temp<=lle2(8) & lle2(8 downto 1);
--mdata3_temp<=lle3(8) & lle3(8 downto 1);
prid0_temp<=prid(4) & prid(4) & prid(4) & prid(4) & prid(4) & prid(4 downto 0);
prid1_temp<=prid(9) & prid(9) & prid(9) & prid(9) & prid(9) & prid(9 downto 5);
prid2_temp<=prid(14) & prid(14) & prid(14) & prid(14) & prid(14) & prid(14 downto 10);
prid3_temp<=prid(19) & prid(19) & prid(19) & prid(19) & prid(19) & prid(19 downto 15);
end if;
end process;
ad0: add9 PORT MAP(prid0_temp,mdata0_temp,hclk,nd0);
ad1: add9 PORT MAP(prid1_temp,mdata1_temp,hclk,nd1);
ad2: add9 PORT MAP(prid2_temp,mdata2_temp,hclk,nd2);
ad3: add9 PORT MAP(prid3_temp,mdata3_temp,hclk,nd3);
process(hclk)
begin
if hclk'event and hclk='1' then
onemark0<=nd0(9) or nd0(8) or nd0(7) or nd0(6) or nd0(5) or nd0(4);
zeromark00<=nd0(9) and nd0(8) and nd0(7) and nd0(6) and nd0(5) and nd0(4);
zeromark01<=nd0(3) or nd0(2) or nd0(1) or nd0(0);
onemark1<=nd1(9) or nd1(8) or nd1(7) or nd1(6) or nd1(5) or nd1(4);
zeromark10<=nd1(9) and nd1(8) and nd1(7) and nd1(6) and nd1(5) and nd1(4);
zeromark11<=nd1(3) or nd1(2) or nd1(1) or nd1(0);
onemark2<=nd2(9) or nd2(8) or nd2(7) or nd2(6) or nd2(5) or nd2(4);
zeromark20<=nd2(9) and nd2(8) and nd2(7) and nd2(6) and nd2(5) and nd2(4);
zeromark21<=nd2(3) or nd2(2) or nd2(1) or nd2(0);
onemark3<=nd3(9) or nd3(8) or nd3(7) or nd3(6) or nd3(5) or nd3(4);
zeromark30<=nd3(9) and nd3(8) and nd3(7) and nd3(6) and nd3(5) and nd3(4);
zeromark31<=nd3(3) or nd3(2) or nd3(1) or nd3(0);
nd0_temp<=nd0;
nd1_temp<=nd1;
nd2_temp<=nd2;
nd3_temp<=nd3;
--tzm<=zeromark0;
end if;
end process;
zeromark0<=zeromark00 & zeromark01;
zeromark1<=zeromark10 & zeromark11;
zeromark2<=zeromark20 & zeromark21;
zeromark3<=zeromark30 & zeromark31;
process(hclk)
begin
if hclk'event and hclk='1' then
case nd0_temp(9) is
when '0'=>case onemark0 is
when '0'=>newd0<=nd0_temp(4 downto 0);
when '1'=>newd0<="01111";
end case;
when '1'=>case zeromark0 is
when "11"=>newd0<=nd0_temp(4 downto 0);
when others=>newd0<="10001";
end case;
end case;
case nd1_temp(9) is
when '0'=>case onemark1 is
when '0'=>newd1<=nd1_temp(4 downto 0);
when '1'=>newd1<="01111";
end case;
when '1'=>case zeromark1 is
when "11"=>newd1<=nd1_temp(4 downto 0);
when others=>newd1<="10001";
end case;
end case;
case nd2_temp(9) is
when '0'=>case onemark2 is
when '0'=>newd2<=nd2_temp(4 downto 0);
when '1'=>newd2<="01111";
end case;
when '1'=>case zeromark2 is
when "11"=>newd2<=nd2_temp(4 downto 0);
when others=>newd2<="10001";
end case;
end case;
case nd3_temp(9) is
when '0'=>case onemark3 is
when '0'=>newd3<=nd3_temp(4 downto 0);
when '1'=>newd3<="01111";
end case;
when '1'=>case zeromark3 is
when "11"=>newd3<=nd3_temp(4 downto 0);
when others=>newd3<="10001";
end case;
end case;
end if;
end process;
shfw: shift_midw PORT MAP (hclk,ite_col_adr,ite_row_adr,ite_we,midbufcol,midbufrow,midbufwe);
--process(hclk)
--begin
-- if hclk'event and hclk='1' then
-- tmdata0<=mdata0_temp;
-- tmdata1<=mdata1_temp;
-- tmdata2<=mdata2_temp;
-- tmdata3<=mdata3_temp;
-- tndata0<=newd0;
-- tndata1<=newd1;
-- tndata2<=newd2;
-- tndata3<=newd3;
-- tp0<=itepri0;--prid0_temp;
-- tp1<=itepri1;--prid1_temp;
-- tp2<=itepri2;--prid2_temp;
-- tp3<=itepri3;--prid3_temp;
-- tmidbufcol<=midbufcol;
-- tmidbufrow<=midbufrow;
-- tmidbufwe<=midbufwe;
--end if;
--end process;
pri_sft0: itepri_sft PORT MAP (hclk,prid(4 downto 0),itepri0);
pri_sft1: itepri_sft PORT MAP (hclk,prid(9 downto 5),itepri1);
pri_sft2: itepri_sft PORT MAP (hclk,prid(14 downto 10),itepri2);
pri_sft3: itepri_sft PORT MAP (hclk,prid(19 downto 15),itepri3);
--process(clk)
--begin
-- if clk'event and clk='1' then
--itep<=itepri3;
-- end if;
--end process;
mbuf: midbuf PORT map
(
hclk,
newd0,newd1,newd2,newd3,
midbufwe,
midbufcol & midbufrow(4 downto 0) ,
re0,re1,re2,re3,
cnt6 & cnt4_temp1,
midbuf_sel,
--mq0,mq1,mq2,mq3,
mid_q
);
mbuf_pri: midbuf PORT map
(
hclk,
itepri0,itepri1,itepri2,itepri3,
midbufwe,
midbufcol & midbufrow(4 downto 0) ,
re0,re1,re2,re3,
cnt6 & cnt4_temp1,
midbuf_sel,
--mq4,mq5,mq6,mq7,
mid_pri
);
process(hclk)
begin
if hclk'event and hclk='1' then
midq<=mid_q;
midpri<=mid_pri;
--tited<=midq;
--toutpri<=midpri;
end if;
end process;
process(hclk)
begin
if hclk'event and hclk='1' then
case ite_num is
when "0000"=>ited<=buf_q;
outpri<=buf_q;
when others=>ited<=midq;
outpri<=midpri;
end case;
end if;
end process;
outsft: outstr_shift PORT map(clk,framestart,outflag,saveflag,oena);
end rtl;
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