sort4.tan.qmsg

verilog hdl经典例程

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Classic Timing Analyzer Quartus II " "Info: Running Quartus II Classic Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 8.0 Build 231 07/10/2008 Service Pack 1 SJ Full Version " "Info: Version 8.0 Build 231 07/10/2008 Service Pack 1 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Sat May 16 22:05:47 2009 " "Info: Processing started: Sat May 16 22:05:47 2009" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_tan --read_settings_files=off --write_settings_files=off sort4 -c sort4 --timing_analysis_only " "Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off sort4 -c sort4 --timing_analysis_only" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0 0}
{ "Info" "ITDB_FULL_TPD_RESULT" "d\[1\] rd\[0\] 16.191 ns Longest " "Info: Longest tpd from source pin \"d\[1\]\" to destination pin \"rd\[0\]\" is 16.191 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.807 ns) 0.807 ns d\[1\] 1 PIN PIN_T13 3 " "Info: 1: + IC(0.000 ns) + CELL(0.807 ns) = 0.807 ns; Loc. = PIN_T13; Fanout = 3; PIN Node = 'd\[1\]'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "" { d[1] } "NODE_NAME" } } { "sort4.v" "" { Text "E:/lab/sort4/sort4.v" 3 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(4.426 ns) + CELL(0.346 ns) 5.579 ns LessThan1~304 2 COMB LCCOMB_X25_Y1_N16 1 " "Info: 2: + IC(4.426 ns) + CELL(0.346 ns) = 5.579 ns; Loc. = LCCOMB_X25_Y1_N16; Fanout = 1; COMB Node = 'LessThan1~304'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "4.772 ns" { d[1] LessThan1~304 } "NODE_NAME" } } { "sort4.v" "" { Text "E:/lab/sort4/sort4.v" 18 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.236 ns) + CELL(0.228 ns) 6.043 ns LessThan1~305 3 COMB LCCOMB_X25_Y1_N20 10 " "Info: 3: + IC(0.236 ns) + CELL(0.228 ns) = 6.043 ns; Loc. = LCCOMB_X25_Y1_N20; Fanout = 10; COMB Node = 'LessThan1~305'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.464 ns" { LessThan1~304 LessThan1~305 } "NODE_NAME" } } { "sort4.v" "" { Text "E:/lab/sort4/sort4.v" 18 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.149 ns) + CELL(0.053 ns) 7.245 ns y~651 4 COMB LCCOMB_X25_Y1_N6 3 " "Info: 4: + IC(1.149 ns) + CELL(0.053 ns) = 7.245 ns; Loc. = LCCOMB_X25_Y1_N6; Fanout = 3; COMB Node = 'y~651'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "1.202 ns" { LessThan1~305 y~651 } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.498 ns) + CELL(0.225 ns) 9.968 ns LessThan3~259 5 COMB LCCOMB_X7_Y13_N22 1 " "Info: 5: + IC(2.498 ns) + CELL(0.225 ns) = 9.968 ns; Loc. = LCCOMB_X7_Y13_N22; Fanout = 1; COMB Node = 'LessThan3~259'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "2.723 ns" { y~651 LessThan3~259 } "NODE_NAME" } } { "sort4.v" "" { Text "E:/lab/sort4/sort4.v" 18 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.207 ns) + CELL(0.225 ns) 10.400 ns LessThan3~260 6 COMB LCCOMB_X7_Y13_N8 8 " "Info: 6: + IC(0.207 ns) + CELL(0.225 ns) = 10.400 ns; Loc. = LCCOMB_X7_Y13_N8; Fanout = 8; COMB Node = 'LessThan3~260'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "0.432 ns" { LessThan3~259 LessThan3~260 } "NODE_NAME" } } { "sort4.v" "" { Text "E:/lab/sort4/sort4.v" 18 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.758 ns) + CELL(0.346 ns) 12.504 ns y~659 7 COMB LCCOMB_X21_Y8_N18 1 " "Info: 7: + IC(1.758 ns) + CELL(0.346 ns) = 12.504 ns; Loc. = LCCOMB_X21_Y8_N18; Fanout = 1; COMB Node = 'y~659'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "2.104 ns" { LessThan3~260 y~659 } "NODE_NAME" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.745 ns) + CELL(1.942 ns) 16.191 ns rd\[0\] 8 PIN PIN_U14 0 " "Info: 8: + IC(1.745 ns) + CELL(1.942 ns) = 16.191 ns; Loc. = PIN_U14; Fanout = 0; PIN Node = 'rd\[0\]'" {  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "3.687 ns" { y~659 rd[0] } "NODE_NAME" } } { "sort4.v" "" { Text "E:/lab/sort4/sort4.v" 2 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "4.172 ns ( 25.77 % ) " "Info: Total cell delay = 4.172 ns ( 25.77 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "12.019 ns ( 74.23 % ) " "Info: Total interconnect delay = 12.019 ns ( 74.23 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0 0}  } { { "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/80/quartus/bin/TimingClosureFloorplan.fld" "" "16.191 ns" { d[1] LessThan1~304 LessThan1~305 y~651 LessThan3~259 LessThan3~260 y~659 rd[0] } "NODE_NAME" } } { "c:/altera/80/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/80/quartus/bin/Technology_Viewer.qrui" "16.191 ns" { d[1] {} d[1]~combout {} LessThan1~304 {} LessThan1~305 {} y~651 {} LessThan3~259 {} LessThan3~260 {} y~659 {} rd[0] {} } { 0.000ns 0.000ns 4.426ns 0.236ns 1.149ns 2.498ns 0.207ns 1.758ns 1.745ns } { 0.000ns 0.807ns 0.346ns 0.228ns 0.053ns 0.225ns 0.225ns 0.346ns 1.942ns } "" } }  } 0 0 "%4!s! tpd from source pin \"%1!s!\" to destination pin \"%2!s!\" is %3!s!" 0 0 "" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Classic Timing Analyzer 0 s 0 s Quartus II " "Info: Quartus II Classic Timing Analyzer was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "130 " "Info: Peak virtual memory: 130 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 0} { "Info" "IQEXE_END_BANNER_TIME" "Sat May 16 22:05:48 2009 " "Info: Processing ended: Sat May 16 22:05:48 2009" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Info: Elapsed time: 00:00:01" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 0} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:01 " "Info: Total CPU time (on all processors): 00:00:01" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 0}