a_clk.vhd

Workshop vhdl code from Esperan

-----------------------------------------------------------------------
-- 
-- Original Code Copyright (c) 1999 by Esperan. All rights reserved.
-- www.esperan.com
-- 
-- This source file may be used and distributed without restriction
-- provided that this copyright statement is not removed from the file
-- and that any derivative work contains this copyright notice. 
--
-- Esperan VHDL Alarm Clock Lab Exercise Design V5.0
--
-- A_clk.vhd
-- Structural model for the complete Alarm Clock design (Lab 13)
--
----------------------------------------------------

Library IEEE;
use IEEE.Std_Logic_1164.all; 

entity A_CLK is
port ( CLK              : in std_logic;
       RESET         : in std_logic;
       STOPWATCH             : in std_logic;
       KEYPAD_ROWS      : in std_logic_vector(3 downto 0);
       KEYPAD_COLUMNS   : out std_logic_vector(2 downto 0);
       SOUND_ALARM      : out std_logic;
       DISPLAY_LS_MIN   : out std_logic_vector(6 downto 0);
       DISPLAY_MS_MIN   : out std_logic_vector(6 downto 0);
       DISPLAY_LS_HR    : out std_logic_vector(6 downto 0);
       DISPLAY_MS_HR    : out std_logic_vector(6 downto 0));
end A_CLK;

architecture STRUCT of A_CLK is

   component KEYSCAN
   port( CLK          : in std_logic;
         RESET        : in std_logic;
         SHIFT        : in std_logic;
         ROWS         : in std_logic_vector(3 downto 0);
         COLUMNS      : out std_logic_vector(2 downto 0);
         KEY          : out std_logic_vector(3 downto 0);
         KEY_BUFFER_0 : out std_logic_vector(3 downto 0);
         KEY_BUFFER_1 : out std_logic_vector(3 downto 0);
         KEY_BUFFER_2 : out std_logic_vector(3 downto 0);
         KEY_BUFFER_3 : out std_logic_vector(3 downto 0);
         TIME_BUTTON  : out std_logic;
         ALARM_BUTTON : out std_logic);
   end component;

  component A_FSM2
  port( CLK           : in std_logic;
        RESET         : in std_logic;
        KEY           : in std_logic_vector(3 downto 0);
        ALARM_BUTTON  : in std_logic;
        TIME_BUTTON   : in std_logic;
        ONE_SECOND     : in std_logic;
        LOAD_NEW_A    : out std_logic;
        SHOW_A        : out std_logic;
        SHOW_NEW_TIME : out std_logic;
        LOAD_NEW_C    : out std_logic;
        SHIFT         : out std_logic);
  end component;

component TIMEGEN
   port( CLK          : in std_logic;
         RESET        : in std_logic;
         STOPWATCH    : in std_logic;
         ONE_SECOND   : out std_logic;
         ONE_MINUTE   : out std_logic);
end component;

  component COUNT4 
  port( NEW_CURRENT_TIME_LS_MIN, 
           NEW_CURRENT_TIME_MS_MIN, 
           NEW_CURRENT_TIME_LS_HR, 
           NEW_CURRENT_TIME_MS_HR  : in std_logic_vector(3 downto 0);
           LOAD_NEW_C              : in std_logic;
           CLK, ONE_MINUTE, 
           RESET                   : in std_logic;
           CURRENT_TIME_LS_MIN,   
           CURRENT_TIME_MS_MIN,  
           CURRENT_TIME_LS_HR,    
           CURRENT_TIME_MS_HR      : out std_logic_vector(3 downto 0)
       );
  end component;

  component ALREG4 
  port( KEYPAD_LS_MIN,
           KEYPAD_MS_MIN,
           KEYPAD_LS_HR,
           KEYPAD_MS_HR           : in std_logic_vector (3 downto 0);
           LOAD_NEW_A               : in std_logic;
           CLK                                  : in std_logic;
           RESET                              : in std_logic;
           ALARM_TIME_LS_MIN,
           ALARM_TIME_MS_MIN,
           ALARM_TIME_LS_HR,      
           ALARM_TIME_MS_HR  : out std_logic_vector (3 downto 0)
       );
  end component;

  component DDRV4
  port ( ALARM_TIME_LS_MIN, CURRENT_TIME_LS_MIN, KEYPAD_LS_MIN  : in std_logic_vector(3 downto 0);
         ALARM_TIME_MS_MIN, CURRENT_TIME_MS_MIN, KEYPAD_MS_MIN  : in std_logic_vector(3 downto 0);
         ALARM_TIME_LS_HR, CURRENT_TIME_LS_HR, KEYPAD_LS_HR     : in std_logic_vector(3 downto 0);
         ALARM_TIME_MS_HR, CURRENT_TIME_MS_HR, KEYPAD_MS_HR     : in std_logic_vector(3 downto 0);
         SHOW_A, SHOW_NEW_TIME     : in std_logic;
         SOUND_ALARM               : out std_logic;
         DISPLAY_LS_MIN            : out std_logic_vector(6 downto 0);
         DISPLAY_MS_MIN            : out std_logic_vector(6 downto 0);
         DISPLAY_LS_HR             : out std_logic_vector(6 downto 0);
         DISPLAY_MS_HR             : out std_logic_vector(6 downto 0)
       );
  end component;
 

   signal KEYPAD_LS_MIN, KEYPAD_MS_MIN,
          KEYPAD_LS_HR, KEYPAD_MS_HR             : std_logic_vector (3 downto 0);
   signal ALARM_TIME_LS_MIN, ALARM_TIME_MS_MIN,
	  ALARM_TIME_LS_HR, ALARM_TIME_MS_HR       : std_logic_vector (3 downto 0);
   signal CURRENT_TIME_LS_MIN, CURRENT_TIME_MS_MIN,
	  CURRENT_TIME_LS_HR, CURRENT_TIME_MS_HR   : std_logic_vector (3 downto 0);
   signal KEY              : std_logic_vector (3 downto 0);
   signal LOAD_NEW_A       : std_logic;
   signal LOAD_NEW_C       : std_logic;
   signal SHOW_A           : std_logic;
   signal SHOW_NEW_TIME    : std_logic;
   signal SHIFT            : std_logic;
   signal ALARM_BUTTON     : std_logic;
   signal TIME_BUTTON      : std_logic;
   signal ONE_SECOND       : std_logic;
   signal ONE_MINUTE       : std_logic;
   
 
begin

   ---------------------------------------------
   -- instantiate blocks
   ---------------------------------------------
   

KEYBOARD_INTERFACE: KEYSCAN
port map (CLK => CLK,
          RESET => RESET,
          SHIFT => SHIFT,
          ROWS => KEYPAD_ROWS,
          COLUMNS => KEYPAD_COLUMNS,
          KEY => KEY,
          KEY_BUFFER_0 => KEYPAD_LS_MIN,
          KEY_BUFFER_1 => KEYPAD_MS_MIN,
          KEY_BUFFER_2 => KEYPAD_LS_HR,
          KEY_BUFFER_3 => KEYPAD_MS_HR,
          TIME_BUTTON => TIME_BUTTON,
          ALARM_BUTTON => ALARM_BUTTON);

CONTROL: A_FSM2
port map(CLK => CLK,
         RESET => RESET,
         KEY => KEY,
         ALARM_BUTTON => ALARM_BUTTON,
         TIME_BUTTON => TIME_BUTTON,
         ONE_SECOND => ONE_SECOND,
         LOAD_NEW_A => LOAD_NEW_A,
         SHOW_A => SHOW_A,
         SHOW_NEW_TIME => SHOW_NEW_TIME,
         LOAD_NEW_C => LOAD_NEW_C,
         SHIFT => SHIFT);

ONE_MINUTE_TIMER: TIMEGEN
   port map ( CLK => CLK,
              RESET => RESET,
              STOPWATCH => STOPWATCH,
              ONE_SECOND => ONE_SECOND,
              ONE_MINUTE => ONE_MINUTE);

COUNTER: COUNT4
port map(NEW_CURRENT_TIME_LS_MIN => KEYPAD_LS_MIN, 
         NEW_CURRENT_TIME_MS_MIN => KEYPAD_MS_MIN, 
         NEW_CURRENT_TIME_LS_HR => KEYPAD_LS_HR, 
         NEW_CURRENT_TIME_MS_HR => KEYPAD_MS_HR,
         LOAD_NEW_C => LOAD_NEW_C,
         CLK => CLK,
         ONE_MINUTE => ONE_MINUTE,
         RESET => RESET,
         CURRENT_TIME_LS_MIN => CURRENT_TIME_LS_MIN,   
         CURRENT_TIME_MS_MIN => CURRENT_TIME_MS_MIN,  
         CURRENT_TIME_LS_HR => CURRENT_TIME_LS_HR,    
         CURRENT_TIME_MS_HR => CURRENT_TIME_MS_HR);

REG: ALREG4
port map(KEYPAD_LS_MIN => KEYPAD_LS_MIN, 
         KEYPAD_MS_MIN => KEYPAD_MS_MIN, 
         KEYPAD_LS_HR => KEYPAD_LS_HR, 
         KEYPAD_MS_HR => KEYPAD_MS_HR,
         LOAD_NEW_A => LOAD_NEW_A,
         CLK => CLK,
         RESET => RESET,
         ALARM_TIME_LS_MIN => ALARM_TIME_LS_MIN,
	 ALARM_TIME_MS_MIN => ALARM_TIME_MS_MIN,
	 ALARM_TIME_LS_HR => ALARM_TIME_LS_HR,      
	 ALARM_TIME_MS_HR => ALARM_TIME_MS_HR);

DRIVER: DDRV4 
port map (ALARM_TIME_LS_MIN => ALARM_TIME_LS_MIN, 
         CURRENT_TIME_LS_MIN  => CURRENT_TIME_LS_MIN, 
         KEYPAD_LS_MIN => KEYPAD_LS_MIN,
         ALARM_TIME_MS_MIN => ALARM_TIME_MS_MIN,
         CURRENT_TIME_MS_MIN => CURRENT_TIME_MS_MIN,
         KEYPAD_MS_MIN => KEYPAD_MS_MIN,
         ALARM_TIME_LS_HR => ALARM_TIME_LS_HR,
         CURRENT_TIME_LS_HR => CURRENT_TIME_LS_HR,
         KEYPAD_LS_HR => KEYPAD_LS_HR,
         ALARM_TIME_MS_HR => ALARM_TIME_MS_HR,
         CURRENT_TIME_MS_HR => CURRENT_TIME_MS_HR,
         KEYPAD_MS_HR => KEYPAD_MS_HR,
         SHOW_A => SHOW_A,
        SHOW_NEW_TIME => SHOW_NEW_TIME,
        SOUND_ALARM => SOUND_ALARM,
        DISPLAY_LS_MIN  => DISPLAY_LS_MIN,
        DISPLAY_MS_MIN  => DISPLAY_MS_MIN,
        DISPLAY_LS_HR  => DISPLAY_LS_HR,
        DISPLAY_MS_HR  => DISPLAY_MS_HR);

end STRUCT;