t16.vhd

Workshop vhdl code from Esperan

--
-- This file tests support for Array types on ports (arrays of integers).
-- This test assumes that user defined packages are supported by your
-- synthesis tool.
--
package P_TEST is
	type INT_ARRAY is array (0 to 7) of integer range 0 to 9;
end P_TEST;

use WORK.P_TEST.all;
entity TEST is
	port(	A_IN : in  INT_ARRAY;
		B_OUT: out INT_ARRAY);
end TEST;
architecture t16 of TEST is
begin
	B_OUT <= A_IN;
end t16;