t174.vhd

来自「Workshop vhdl code from Esperan」· VHDL 代码 · 共 23 行

--
-- This file tests for resource sharing when using 
-- exclusive expressions outside the same if statement.
-- Only one adder and mux should result from the synthesis of that code.
--
entity TEST is 
	port( SEL   : in bit;
	      A,B,C : in integer range 0 to 7;
	      Y     : out integer range 0 to 15);
end TEST;
architecture T174 of TEST is
begin
	process(A, B, C, SEL)
	begin
		if SEL='1' then 
			Y <= A + B;
		end if;
		if SEL='0' then
			Y <= A + C;
		end if;
	end process;
end T174;