t21.vhd

来自「Workshop vhdl code from Esperan」· VHDL 代码 · 共 21 行

--
-- This file tests support for Records of simple types.
--
entity TEST is
	port( A	: in  bit;
	      Z : out bit);
end TEST;
architecture T21 of TEST is
	type T_DATA is record 
		PARITY 	: bit;
		DATA 	: bit_vector(3 downto 0);
		ADDRESS : integer range 0 to 7;
	end record;
	signal RX_DATA, TX_DATA : T_DATA;
begin
	RX_DATA.PARITY <= A;
	TX_DATA <= RX_DATA;
	Z <= TX_DATA.PARITY;
end T21;