t156.vhd

Workshop vhdl code from Esperan

--
-- This file tests support for the use of the function
-- call rising_edge() for edge detection.
--
library IEEE;
use IEEE.Std_Logic_1164.all;
entity TEST is 
	port( D, CLK : in std_logic;
	      Q : out std_logic);
end TEST;
architecture T156 of TEST is
begin
	process
	begin
		wait until rising_edge(CLK);
		Q <= D;
	end process;
end T156;