t171.vhd

Workshop vhdl code from Esperan

--
-- This file tests for resource sharing when using multi-indentical 
-- expression in a process.
-- Only three adders should be synthesised from this code.
--
entity TEST is 
	port( A,B,C,D : in integer range 0 to 7;
	      Y,Z : out integer range 0 to 23);
end TEST;
architecture T171 of TEST is
begin
	process(A, B, C, D)
	begin
		Y <= A + B + C;
		Z <= A + B + D;
	end process;
end T171;