clk_div10.fit

一个用VHDL编写的秒表程序

-- MAX+plus II Compiler Fit File      
-- Version 9.23 3/19/99               
-- Compiled: 02/20/2009 22:23:51      

-- Copyright (C) 1988-1999 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors.  No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.

CHIP "clk_div10"
BEGIN

    DEVICE = "EPF10K10LC84-3";

    "clk"                          : INPUT_PIN  = 43     ;
    "reset"                        : INPUT_PIN  = 84     ;
    "clk_div"                      : OUTPUT_PIN = 16     ;
    "|LPM_ADD_SUB:66|addcore:adder|:55" : LOCATION   = LC7_A1 ;
    ":3"                           : LOCATION   = LC1_A1 ;
    ":5"                           : LOCATION   = LC6_A1 ;  -- count3
    ":6"                           : LOCATION   = LC5_A1 ;  -- count2
    ":7"                           : LOCATION   = LC4_A1 ;  -- count1
    ":8"                           : LOCATION   = LC3_A1 ;  -- count0
    ":33"                          : LOCATION   = LC2_A1 ;
    "~92~1"                        : LOCATION   = LC8_A1 ;

END;

INTERNAL_INFO "clk_div10"
BEGIN
	DEVICE = EPF10K10LC84-3;
    OD5P43  : LORAX = "1:FB5->LC1_A1,->LC6_A1,->LC5_A1,->LC4_A1,->LC3_A1|";
    OD0P84  : LORAX = "1:FB0|2:FH0R0,PA0R0C0->LC5_A1,->LC4_A1,->LC3_A1,->LC8_A1||";
    LC1_A1  : LORAX = "1:MSW0R0C0,HHL22R0->OH8R0P16|";
	LC7_A1  : LORAX2 = "X, X, LC4_A1, LC3_A1";
	LC1_A1  : LORAX2 = "LC6_A1, LC5_A1, LC4_A1, LC3_A1";
	LC6_A1  : LORAX2 = "LC7_A1, LC6_A1, LC5_A1, LC8_A1";
	LC5_A1  : LORAX2 = "OD0P84, LC7_A1, LC5_A1, LC2_A1";
	LC4_A1  : LORAX2 = "OD0P84, LC4_A1, LC3_A1, LC2_A1";
	LC3_A1  : LORAX2 = "X, X, OD0P84, LC3_A1";
	LC2_A1  : LORAX2 = "LC6_A1, LC5_A1, LC4_A1, LC3_A1";
	LC8_A1  : LORAX2 = "X, X, OD0P84, LC2_A1";
END;