📄 stopwatch.rpt
字号:
r = Fitter-inserted logic cell
p = Packed register
Device-Specific Information: d:\work\max+plus_work\stopwatch\stopwatch.rpt
stopwatch
** FASTTRACK INTERCONNECT UTILIZATION **
Row FastTrack Interconnect:
Global Left Half- Right Half-
FastTrack FastTrack FastTrack
Row Interconnect Interconnect Interconnect Input Pins Output Pins Bidir Pins
A: 9/ 96( 9%) 12/ 48( 25%) 13/ 48( 27%) 0/16( 0%) 9/16( 56%) 0/16( 0%)
B: 8/ 96( 8%) 6/ 48( 12%) 5/ 48( 10%) 0/16( 0%) 0/16( 0%) 0/16( 0%)
C: 11/ 96( 11%) 9/ 48( 18%) 10/ 48( 20%) 0/16( 0%) 0/16( 0%) 0/16( 0%)
Column FastTrack Interconnect:
FastTrack
Column Interconnect Input Pins Output Pins Bidir Pins
01: 2/24( 8%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
02: 2/24( 8%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
03: 1/24( 4%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
04: 1/24( 4%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
05: 1/24( 4%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
06: 1/24( 4%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
07: 1/24( 4%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
08: 1/24( 4%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
09: 1/24( 4%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
10: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
11: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
12: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
13: 1/24( 4%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
14: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
15: 2/24( 8%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
16: 2/24( 8%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
17: 3/24( 12%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
18: 1/24( 4%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
19: 1/24( 4%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
20: 1/24( 4%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
21: 1/24( 4%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
22: 1/24( 4%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
23: 1/24( 4%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
24: 2/24( 8%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
EA: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
Device-Specific Information: d:\work\max+plus_work\stopwatch\stopwatch.rpt
stopwatch
** CLOCK SIGNALS **
Type Fan-out Name
LCELL 26 |control1:u2|:21
DFF 15 |clk_div:u1|clk_div10:u0|:3
INPUT 10 clk
LCELL 4 |clk_div:u1|:8
DFF 1 |keyin:u0|:7
Device-Specific Information: d:\work\max+plus_work\stopwatch\stopwatch.rpt
stopwatch
** CLEAR SIGNALS **
Type Fan-out Name
LCELL 27 |time_counter:u3|:48
Device-Specific Information: d:\work\max+plus_work\stopwatch\stopwatch.rpt
stopwatch
** EQUATIONS **
clk : INPUT;
on_off : INPUT;
reset : INPUT;
sysreset : INPUT;
-- Node name is 'choose0'
-- Equation name is 'choose0', type is output
choose0 = _LC3_A15;
-- Node name is 'choose1'
-- Equation name is 'choose1', type is output
choose1 = _LC4_A15;
-- Node name is 'choose2'
-- Equation name is 'choose2', type is output
choose2 = _LC5_A17;
-- Node name is 'choose3'
-- Equation name is 'choose3', type is output
choose3 = _LC3_A23;
-- Node name is 'choose4'
-- Equation name is 'choose4', type is output
choose4 = _LC1_A22;
-- Node name is 'choose5'
-- Equation name is 'choose5', type is output
choose5 = _LC1_A21;
-- Node name is 'choose6'
-- Equation name is 'choose6', type is output
choose6 = _LC1_A19;
-- Node name is 'choose7'
-- Equation name is 'choose7', type is output
choose7 = _LC1_A17;
-- Node name is 'segment0'
-- Equation name is 'segment0', type is output
segment0 = _LC2_A13;
-- Node name is 'segment1'
-- Equation name is 'segment1', type is output
segment1 = _LC8_A13;
-- Node name is 'segment2'
-- Equation name is 'segment2', type is output
segment2 = _LC5_A14;
-- Node name is 'segment3'
-- Equation name is 'segment3', type is output
segment3 = _LC4_A14;
-- Node name is 'segment4'
-- Equation name is 'segment4', type is output
segment4 = _LC6_A14;
-- Node name is 'segment5'
-- Equation name is 'segment5', type is output
segment5 = _LC1_A13;
-- Node name is 'segment6'
-- Equation name is 'segment6', type is output
segment6 = _LC1_A24;
-- Node name is '|clk_div:u1|clk_div4:u1|:6' = '|clk_div:u1|clk_div4:u1|count0'
-- Equation name is '_LC2_B11', type is buried
_LC2_B11 = DFFE( _EQ001, _LC2_B23, VCC, VCC, VCC);
_EQ001 = !_LC2_B11 & !sysreset;
-- Node name is '|clk_div:u1|clk_div4:u1|:5' = '|clk_div:u1|clk_div4:u1|count1'
-- Equation name is '_LC1_B11', type is buried
_LC1_B11 = DFFE( _EQ002, _LC2_B23, VCC, VCC, VCC);
_EQ002 = !_LC1_B11 & _LC2_B11 & !sysreset
# _LC1_B11 & !_LC2_B11 & !sysreset;
-- Node name is '|clk_div:u1|clk_div4:u1|:3'
-- Equation name is '_LC5_B11', type is buried
_LC5_B11 = DFFE( _EQ003, _LC2_B23, VCC, VCC, VCC);
_EQ003 = _LC1_B11 & _LC2_B11;
-- Node name is '|clk_div:u1|clk_div10:u0|:8' = '|clk_div:u1|clk_div10:u0|count0'
-- Equation name is '_LC1_B23', type is buried
_LC1_B23 = DFFE( _EQ004, GLOBAL( clk), VCC, VCC, VCC);
_EQ004 = !_LC1_B23 & !sysreset;
-- Node name is '|clk_div:u1|clk_div10:u0|:7' = '|clk_div:u1|clk_div10:u0|count1'
-- Equation name is '_LC5_B23', type is buried
_LC5_B23 = DFFE( _EQ005, GLOBAL( clk), VCC, VCC, VCC);
_EQ005 = _LC1_B23 & !_LC3_B23 & !_LC5_B23 & !sysreset
# !_LC1_B23 & !_LC3_B23 & _LC5_B23 & !sysreset;
-- Node name is '|clk_div:u1|clk_div10:u0|:6' = '|clk_div:u1|clk_div10:u0|count2'
-- Equation name is '_LC6_B23', type is buried
_LC6_B23 = DFFE( _EQ006, GLOBAL( clk), VCC, VCC, VCC);
_EQ006 = !_LC3_B23 & _LC6_B23 & !_LC7_B23 & !sysreset
# !_LC3_B23 & !_LC6_B23 & _LC7_B23 & !sysreset;
-- Node name is '|clk_div:u1|clk_div10:u0|:5' = '|clk_div:u1|clk_div10:u0|count3'
-- Equation name is '_LC8_B23', type is buried
_LC8_B23 = DFFE( _EQ007, GLOBAL( clk), VCC, VCC, VCC);
_EQ007 = _LC4_B23 & !_LC6_B23 & _LC8_B23
# _LC4_B23 & !_LC7_B23 & _LC8_B23
# _LC4_B23 & _LC6_B23 & _LC7_B23 & !_LC8_B23;
-- Node name is '|clk_div:u1|clk_div10:u0|LPM_ADD_SUB:66|addcore:adder|:55' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC7_B23', type is buried
_LC7_B23 = LCELL( _EQ008);
_EQ008 = _LC1_B23 & _LC5_B23;
-- Node name is '|clk_div:u1|clk_div10:u0|:3'
-- Equation name is '_LC2_B23', type is buried
_LC2_B23 = DFFE( _EQ009, GLOBAL( clk), VCC, VCC, VCC);
_EQ009 = _LC1_B23 & !_LC5_B23 & !_LC6_B23 & _LC8_B23;
-- Node name is '|clk_div:u1|clk_div10:u0|:33'
-- Equation name is '_LC3_B23', type is buried
!_LC3_B23 = _LC3_B23~NOT;
_LC3_B23~NOT = LCELL( _EQ010);
_EQ010 = !_LC1_B23
# _LC5_B23
# _LC6_B23
# !_LC8_B23;
-- Node name is '|clk_div:u1|clk_div10:u0|~110~1'
-- Equation name is '_LC4_B23', type is buried
-- synthesized logic cell
_LC4_B23 = LCELL( _EQ011);
_EQ011 = !_LC3_B23 & !sysreset;
-- Node name is '|clk_div:u1|:8'
-- Equation name is '_LC3_B20', type is buried
!_LC3_B20 = _LC3_B20~NOT;
_LC3_B20~NOT = LCELL( _EQ012);
_EQ012 = !_LC2_B23
# !_LC5_B11;
-- Node name is '|control1:u2|:6' = '|control1:u2|stroble'
-- Equation name is '_LC7_B16', type is buried
_LC7_B16 = DFFE(!_LC7_B16, _LC2_B20, !_LC1_B20, VCC, VCC);
-- Node name is '|control1:u2|:21'
-- Equation name is '_LC1_B16', type is buried
_LC1_B16 = LCELL( _EQ013);
_EQ013 = _LC2_B23 & _LC7_B16;
-- Node name is '|display:u4|choose_decode:u1|:217'
-- Equation name is '_LC1_A19', type is buried
!_LC1_A19 = _LC1_A19~NOT;
_LC1_A19~NOT = LCELL( _EQ014);
_EQ014 = _LC1_A20
# !_LC1_A16
# !_LC1_A15;
-- Node name is '|display:u4|choose_decode:u1|:227'
-- Equation name is '_LC1_A21', type is buried
!_LC1_A21 = _LC1_A21~NOT;
_LC1_A21~NOT = LCELL( _EQ015);
_EQ015 = !_LC1_A20
# _LC1_A16
# !_LC1_A15;
-- Node name is '|display:u4|choose_decode:u1|:237'
-- Equation name is '_LC1_A22', type is buried
!_LC1_A22 = _LC1_A22~NOT;
_LC1_A22~NOT = LCELL( _EQ016);
_EQ016 = _LC1_A20
# _LC1_A16
# !_LC1_A15;
-- Node name is '|display:u4|choose_decode:u1|:247'
-- Equation name is '_LC3_A23', type is buried
!_LC3_A23 = _LC3_A23~NOT;
_LC3_A23~NOT = LCELL( _EQ017);
_EQ017 = !_LC1_A20
# !_LC1_A16
# _LC1_A15;
-- Node name is '|display:u4|choose_decode:u1|:257'
-- Equation name is '_LC5_A17', type is buried
!_LC5_A17 = _LC5_A17~NOT;
_LC5_A17~NOT = LCELL( _EQ018);
_EQ018 = _LC1_A20
# !_LC1_A16
# _LC1_A15;
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -