layer0.sro

8051VHDL原代码

# Created by Synplify VHDL Compiler version 3.1.0, Build 049R from Synplicity, Inc.
# Copyright 1994-2004 Synplicity, Inc. , All rights reserved.
# Synthesis Netlist written on Fri Oct 12 10:56:17 2007
#
#
#OPTIONS:"|-mixedhdl|-top|control_mem|-layerid|0|-primux|-fixsmult|-sdff_counter|-infer_seqShift|-nram|-divnmod|-autosm|-fid2|-sharing|on|-encrypt|-ui|-lite|-pro|-ram|-ignore_undefined_lib|-ll|2000|-lib|work|-lib|work"
#CUR:"d:\\Program Files\\Synplicity\\fpga_81\\bin\\c_vhdl.exe":1115125640
#CUR:"d:\\Program Files\\Synplicity\\fpga_81\\lib\\vhd\\location.map":1114701536
#CUR:"d:\\Program Files\\Synplicity\\fpga_81\\lib\\vhd\\std.vhd":1111509844
#CUR:"d:\\Program Files\\Synplicity\\fpga_81\\lib\\vhd\\std.vhd":1111509844
#CUR:"E:\\vhdl\\f8051\\mc8051_p.vhd":1180664350
#CUR:"E:\\vhdl\\f8051\\mc8051_p.vhd":1180664350
#CUR:"d:\\Program Files\\Synplicity\\fpga_81\\lib\\vhd\\std1164.vhd":927285456
#CUR:"d:\\Program Files\\Synplicity\\fpga_81\\lib\\vhd\\std1164.vhd":927285456
#CUR:"d:\\Program Files\\Synplicity\\fpga_81\\lib\\vhd\\arith.vhd":1035356678
#CUR:"d:\\Program Files\\Synplicity\\fpga_81\\lib\\vhd\\arith.vhd":1035356678
#CUR:"E:\\vhdl\\f8051\\control_mem.vhd":1192156846
#CUR:"E:\\vhdl\\f8051\\control_mem.vhd":1192156846
f "d:\Program Files\Synplicity\fpga_81\lib\vhd\std.vhd"; # file 0
af .is_vhdl 1;
f "E:\vhdl\f8051\mc8051_p.vhd"; # file 1
af .is_vhdl 1;
f "d:\Program Files\Synplicity\fpga_81\lib\vhd\std1164.vhd"; # file 2
af .is_vhdl 1;
f "d:\Program Files\Synplicity\fpga_81\lib\vhd\arith.vhd"; # file 3
af .is_vhdl 1;
f "E:\vhdl\f8051\control_mem.vhd"; # file 4
af .is_vhdl 1;
@E
@ 
ftell;
@E@MR@gc::g(::R4(I	FsRMOF0DsF_llCRDs0;P
NR#3HPDE8R
4;N3PRHP#_ER8D4N;
P#R3$VM_lRNb"sIF	"R\ \:\PDE8\U\Vj\64\UlOj_64bE3P8
\"I	FsR \":P\\E\8D\jVU6\4\O0FMs_FDl3ClP\E8";
"
RNP3HFsolhNCOR"FsM0FlD_C;l"
@FR@4c:4::U444:4ORb_4Fr69:jR_bOOLFlr:46j
9;
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;

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;

@HR@4c:n::U44n:(NRslN_80HN_rj(:9NRslN_80HN_rj(:9
;

@FR@4c:U::U44U:nNRsl8_Nsr_Fn9:jRN#_8nsr:;j9
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;

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;

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;

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4;
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H#R3$NM_s$sNb0FsR
4;
@HR@dc:6::Ud46:4jRb_(Hr:Rj9bHj_rj(:9
;

@HR@dc:n::Ud4n:44Rb_(Hr:Rj9bH4_rj(:9
;

@HR@dc:(::Ud4(:4.Rb_(Hr:Rj9bH._rj(:9
;

@HR@dc:U::Ud4U:4dRb_(Hr:Rj9bHd_rj(:9
;

@FR@cc:j::Uc4j:4jRb_(Fr:Rj9b(jr9j,br,n9b6jr9j,br,c9bdjr9j,br,.9b4jr9j,br;j9
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@FR@cc:.::Uc4.:4.Rb_(Fr:Rj9b(.r9.,br,n9b6.r9.,br,c9bd.r9.,br,.9b4.r9.,br;j9
@FR@cc:d::Uc4d:4dRb_(Fr:Rj9b(dr9d,br,n9b6dr9d,br,c9bddr9d,br,.9b4dr9d,br;j9
@FR@cc:U::Uc4U:UDRNDs_0N_M#F9rjRDND_N0sMF#_r;j9
RNH3M#$_sNsNF$bs40R;



@FR@6c:j::U64j:(DRNDO_#FFM_rj6:9OR#FjM_r,j9#MOF_(jr:;d9
@FR@6c:.::U64.:(DRNDL_#kFV_rj(:9LR#kjV_rj(:9
;

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;

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;

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H#R3$NM_s$sNb0FsR
4;
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@FR@(c:d::U(4d:UDRND0_I__CMF9rjRDND__I0CFM_r;j9
RNH3M#$_sNsNF$bs40R;



@HR@(c:6::U(46:nDRNDV_0jr_HjN9RD0D_VHj_r;j9
RNH3M#$_sNsNF$bs40R;



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RNH3M#$_sNsNF$bs40R;



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;

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;

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@FR@gc:n::Ug4n:nMRH0Cbs.R_F#M_H0Cbs.
;

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;

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;

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;

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;

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