mc8051_top.twr

来自「8051VHDL原代码」· TWR 代码 · 共 43 行

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Release 7.1i Trace H.38
Copyright (c) 1995-2005 Xilinx, Inc.  All rights reserved.

D:/Xilinx/bin/nt/trce.exe -ise e:\vhdl\f8051\f8051.ise -intstyle ise -e 3 -l 3
-s 5 -xml mc8051_top mc8051_top.ncd -o mc8051_top.twr mc8051_top.pcf


Design file:              mc8051_top.ncd
Physical constraint file: mc8051_top.pcf
Device,speed:             xc3s200,-5 (ADVANCED 1.35 2005-01-22)
Report level:             error report

Environment Variable      Effect 
--------------------      ------ 
NONE                      No environment variables were set
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INFO:Timing:2698 - No timing constraints found, doing default enumeration.
INFO:Timing:2752 - To get complete path coverage, use the unconstrained paths
   option. All paths that are not constrained will be reported in the
   unconstrained paths section(s) of the report.


Data Sheet report:
-----------------
All values displayed in nanoseconds (ns)

Clock to Setup on destination clock clk
---------------+---------+---------+---------+---------+
               | Src:Rise| Src:Fall| Src:Rise| Src:Fall|
Source Clock   |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
---------------+---------+---------+---------+---------+
clk            |    2.652|         |         |         |
---------------+---------+---------+---------+---------+

Analysis completed Thu Oct 25 20:46:47 2007
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Peak Memory Usage: 107 MB